]> granicus.if.org Git - clang/commitdiff
[CLANG][AVX512][BUILTIN] Adding vpmultishiftqb{128|256|512}
authorMichael Zuckerman <Michael.zuckerman@intel.com>
Mon, 7 Mar 2016 08:29:10 +0000 (08:29 +0000)
committerMichael Zuckerman <Michael.zuckerman@intel.com>
Mon, 7 Mar 2016 08:29:10 +0000 (08:29 +0000)
Differential Revision: http://reviews.llvm.org/D17914

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@262817 91177308-0d34-0410-b5e6-96231b3b80d8

include/clang/Basic/BuiltinsX86.def
lib/Headers/avx512bwintrin.h
lib/Headers/avx512vlbwintrin.h
lib/Headers/avx512vlintrin.h
test/CodeGen/avx512bw-builtins.c
test/CodeGen/avx512vl-builtins.c

index 42d3a0fa55ea9916f3d9f9ec517e4fdfd2e02032..f0b7ad73aaf0c363b608c112307155b0cbd12f5f 100644 (file)
@@ -1719,6 +1719,13 @@ TARGET_BUILTIN(__builtin_ia32_movdquqi256_mask, "V32cV32cV32cUi","","avx512bw,av
 TARGET_BUILTIN(__builtin_ia32_movddup512_mask, "V8dV8dV8dUc","","avx512f")
 TARGET_BUILTIN(__builtin_ia32_movddup128_mask, "V2dV2dV2dUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_movddup256_mask, "V4dV4dV4dUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_pbroadcastb512_gpr_mask, "V64ccV64cULLi","","avx512bw")
+TARGET_BUILTIN(__builtin_ia32_pbroadcastb128_gpr_mask, "V16ccV16cUs","","avx512bw,avx512vl")
+TARGET_BUILTIN(__builtin_ia32_pbroadcastb256_gpr_mask, "V32ccV32cUi","","avx512bw,avx512vl")
+TARGET_BUILTIN(__builtin_ia32_pbroadcastd128_gpr_mask, "V4iiV4iUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_pbroadcastd256_gpr_mask, "V8iiV8iUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_pbroadcastq128_gpr_mask, "V2LLiULLiV2LLiUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_pbroadcastq256_gpr_mask, "V4LLiULLiV4LLiUc","","avx512vl")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN
index 6ae786b86b6d5e8923b50592b1a5aa0a09cb59b2..afa79b7d173bc043af8ab349e255136ea44020e5 100644 (file)
@@ -1917,6 +1917,23 @@ _mm512_maskz_mov_epi8 (__mmask64 __U, __m512i __A)
 }
 
 
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_mask_set1_epi8 (__m512i __O, __mmask64 __M, char __A)
+{
+  return (__m512i) __builtin_ia32_pbroadcastb512_gpr_mask (__A,
+                 (__v64qi) __O,
+                 __M);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_maskz_set1_epi8 (__mmask64 __M, char __A)
+{
+  return (__m512i) __builtin_ia32_pbroadcastb512_gpr_mask (__A,
+                 (__v64qi)
+                 _mm512_setzero_qi(),
+                 __M);
+}
+
 #undef __DEFAULT_FN_ATTRS
 
 #endif
index 569acb05baf50cc2163ed1552b29be61526c5c59..9209de38cca3636c3c5eb30a9ec7c449b4c7cadc 100644 (file)
@@ -2919,6 +2919,39 @@ _mm256_maskz_mov_epi8 (__mmask32 __U, __m256i __A)
 }
 
 
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_mask_set1_epi8 (__m128i __O, __mmask16 __M, char __A)
+{
+  return (__m128i) __builtin_ia32_pbroadcastb128_gpr_mask (__A,
+                 (__v16qi) __O,
+                 __M);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_maskz_set1_epi8 (__mmask16 __M, char __A)
+{
+  return (__m128i) __builtin_ia32_pbroadcastb128_gpr_mask (__A,
+                 (__v16qi)
+                 _mm_setzero_si128 (),
+                 __M);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_mask_set1_epi8 (__m256i __O, __mmask32 __M, char __A)
+{
+  return (__m256i) __builtin_ia32_pbroadcastb256_gpr_mask (__A,
+                 (__v32qi) __O,
+                 __M);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_maskz_set1_epi8 (__mmask32 __M, char __A)
+{
+  return (__m256i) __builtin_ia32_pbroadcastb256_gpr_mask (__A,
+                 (__v32qi)
+                 _mm256_setzero_si256 (),
+                 __M);
+}
 #undef __DEFAULT_FN_ATTRS
 
 #endif /* __AVX512VLBWINTRIN_H */
index 8d15a2267dabf0f4419f777ccad41862273e43cb..0949cb9238a86be183cde4278f82f3762a4970c0 100644 (file)
@@ -6012,6 +6012,62 @@ _mm256_maskz_movedup_pd (__mmask8 __U, __m256d __A)
                (__mmask8) __U);
 }
 
+
+#define _mm_mask_set1_epi32( __O, __M, __A) __extension__ ({ \
+__builtin_ia32_pbroadcastd128_gpr_mask (__A, (__v4si)( __O),\
+                ( __M));\
+})
+
+#define _mm_maskz_set1_epi32( __M, __A) __extension__ ({ \
+__builtin_ia32_pbroadcastd128_gpr_mask (__A,\
+                 (__v4si)\
+                 _mm_setzero_si128 (),\
+                ( __M));\
+})
+
+#define _mm256_mask_set1_epi32( __O, __M, __A) __extension__ ({ \
+__builtin_ia32_pbroadcastd256_gpr_mask (__A, (__v8si)( __O),\
+                ( __M));\
+})
+
+#define _mm256_maskz_set1_epi32( __M, __A) __extension__ ({ \
+__builtin_ia32_pbroadcastd256_gpr_mask (__A,\
+                 (__v8si)\
+                 _mm256_setzero_si256 (),\
+                ( __M));\
+})
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_mask_set1_epi64 (__m128i __O, __mmask8 __M, long long __A)
+{
+  return (__m128i) __builtin_ia32_pbroadcastq128_gpr_mask (__A, (__v2di) __O,
+                 __M);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_maskz_set1_epi64 (__mmask8 __M, long long __A)
+{
+  return (__m128i) __builtin_ia32_pbroadcastq128_gpr_mask (__A,
+                 (__v2di)
+                 _mm_setzero_si128 (),
+                 __M);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_mask_set1_epi64 (__m256i __O, __mmask8 __M, long long __A)
+{
+  return (__m256i) __builtin_ia32_pbroadcastq256_gpr_mask (__A, (__v4di) __O,
+                 __M);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_maskz_set1_epi64 (__mmask8 __M, long long __A)
+{
+  return (__m256i) __builtin_ia32_pbroadcastq256_gpr_mask (__A,
+                 (__v4di)
+                 _mm256_setzero_si256 (),
+                 __M);
+}
 #undef __DEFAULT_FN_ATTRS
 #undef __DEFAULT_FN_ATTRS_BOTH
 
index a78712edad024e36a8918eb345dd34fc3f5a0d2d..8fb094d607761be961ae883774f16dc335569614 100644 (file)
@@ -1299,4 +1299,16 @@ __m512i test_mm512_maskz_mov_epi8(__mmask64 __U, __m512i __A) {
   return _mm512_maskz_mov_epi8(__U, __A); 
 }
 
+__m512i test_mm512_mask_set1_epi8(__m512i __O, __mmask64 __M, char __A) {
+  // CHECK-LABEL: @test_mm512_mask_set1_epi8
+  // CHECK: @llvm.x86.avx512.mask.pbroadcast.b.gpr.512
+  return _mm512_mask_set1_epi8(__O, __M, __A); 
+}
+
+__m512i test_mm512_maskz_set1_epi8(__mmask64 __M, char __A) {
+  // CHECK-LABEL: @test_mm512_maskz_set1_epi8
+  // CHECK: @llvm.x86.avx512.mask.pbroadcast.b.gpr.512
+  return _mm512_maskz_set1_epi8(__M, __A); 
+}
+
 
index bf29bbbf9469c6d89d94dc8c2741c8f76c53517e..99302a064212ad93da21aaa992e247b76439b184 100644 (file)
@@ -4030,4 +4030,53 @@ __m256d test_mm256_maskz_movedup_pd(__mmask8 __U, __m256d __A) {
  // CHECK-LABEL: @test_mm256_maskz_movedup_pd
   // CHECK: @llvm.x86.avx512.mask.movddup.256
   return _mm256_maskz_movedup_pd(__U, __A); 
-}
\ No newline at end of file
+}
+
+__m128i test_mm_mask_set1_epi32(__m128i __O, __mmask8 __M) {
+  // CHECK-LABEL: @test_mm_mask_set1_epi32
+  // CHECK: @llvm.x86.avx512.mask.pbroadcast.d.gpr.128
+  return _mm_mask_set1_epi32(__O, __M, 5); 
+}
+
+__m128i test_mm_maskz_set1_epi32(__mmask8 __M) {
+  // CHECK-LABEL: @test_mm_maskz_set1_epi32
+  // CHECK: @llvm.x86.avx512.mask.pbroadcast.d.gpr.128
+  return _mm_maskz_set1_epi32(__M, 5); 
+}
+
+__m256i test_mm256_mask_set1_epi32(__m256i __O, __mmask8 __M) {
+  // CHECK-LABEL: @test_mm256_mask_set1_epi32
+  // CHECK: @llvm.x86.avx512.mask.pbroadcast.d.gpr.256
+  return _mm256_mask_set1_epi32(__O, __M, 5); 
+}
+
+__m256i test_mm256_maskz_set1_epi32(__mmask8 __M) {
+  // CHECK-LABEL: @test_mm256_maskz_set1_epi32
+  // CHECK: @llvm.x86.avx512.mask.pbroadcast.d.gpr.256
+  return _mm256_maskz_set1_epi32(__M, 5); 
+}
+
+__m128i test_mm_mask_set1_epi64(__m128i __O, __mmask8 __M, long long __A) {
+  // CHECK-LABEL: @test_mm_mask_set1_epi64
+  // CHECK: @llvm.x86.avx512.mask.pbroadcast.q.gpr.128
+  return _mm_mask_set1_epi64(__O, __M, __A); 
+}
+
+__m128i test_mm_maskz_set1_epi64(__mmask8 __M, long long __A) {
+  // CHECK-LABEL: @test_mm_maskz_set1_epi64
+  // CHECK: @llvm.x86.avx512.mask.pbroadcast.q.gpr.128
+  return _mm_maskz_set1_epi64(__M, __A); 
+}
+
+__m256i test_mm256_mask_set1_epi64(__m256i __O, __mmask8 __M, long long __A) {
+  // CHECK-LABEL: @test_mm256_mask_set1_epi64
+  // CHECK: @llvm.x86.avx512.mask.pbroadcast.q.gpr.256
+  return _mm256_mask_set1_epi64(__O, __M, __A); 
+}
+
+__m256i test_mm256_maskz_set1_epi64(__mmask8 __M, long long __A) {
+  // CHECK-LABEL: @test_mm256_maskz_set1_epi64
+  // CHECK: @llvm.x86.avx512.mask.pbroadcast.q.gpr.256
+  return _mm256_maskz_set1_epi64(__M, __A); 
+}
+