Add adst_adst config to vp10_inv_txfm2d_cfg

Change-Id: I042bba27540ab2a3d8a00871980295e98f616480

diff --git a/vp10/common/vp10_inv_txfm2d_cfg.h b/vp10/common/vp10_inv_txfm2d_cfg.h
index 25b7f68aa00a7a7e411c8393dccd111820af265f..c1ce66504e3bd0a72f1d5797e00f0e727b3cfce7 100644 (file)
--- a/vp10/common/vp10_inv_txfm2d_cfg.h
+++ b/vp10/common/vp10_inv_txfm2d_cfg.h
@@ -192,4 +192,98 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_32 = {
     .txfm_func_col = vp10_idct32_new,
     .txfm_func_row = vp10_iadst32_new};
 
+//  ---------------- config inv_adst_adst_4 ----------------
+static const int8_t inv_shift_adst_adst_4[2] = {0, -4};
+static const int8_t inv_stage_range_col_adst_adst_4[6] = {16, 16, 16,
+                                                          16, 15, 15};
+static const int8_t inv_stage_range_row_adst_adst_4[6] = {16, 16, 16,
+                                                          16, 16, 16};
+static const int8_t inv_cos_bit_col_adst_adst_4[6] = {15, 15, 15, 15, 15, 15};
+static const int8_t inv_cos_bit_row_adst_adst_4[6] = {15, 15, 15, 15, 15, 15};
+
+static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_4 = {
+    .txfm_size = 4,
+    .stage_num_col = 6,
+    .stage_num_row = 6,
+
+    .shift = inv_shift_adst_adst_4,
+    .stage_range_col = inv_stage_range_col_adst_adst_4,
+    .stage_range_row = inv_stage_range_row_adst_adst_4,
+    .cos_bit_col = inv_cos_bit_col_adst_adst_4,
+    .cos_bit_row = inv_cos_bit_row_adst_adst_4,
+    .txfm_func_col = vp10_iadst4_new,
+    .txfm_func_row = vp10_iadst4_new};
+
+//  ---------------- config inv_adst_adst_8 ----------------
+static const int8_t inv_shift_adst_adst_8[2] = {-1, -4};
+static const int8_t inv_stage_range_col_adst_adst_8[8] = {16, 16, 16, 16,
+                                                          16, 16, 15, 15};
+static const int8_t inv_stage_range_row_adst_adst_8[8] = {17, 17, 17, 17,
+                                                          17, 17, 17, 17};
+static const int8_t inv_cos_bit_col_adst_adst_8[8] = {15, 15, 15, 15,
+                                                      15, 15, 15, 15};
+static const int8_t inv_cos_bit_row_adst_adst_8[8] = {15, 15, 15, 15,
+                                                      15, 15, 15, 15};
+
+static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_8 = {
+    .txfm_size = 8,
+    .stage_num_col = 8,
+    .stage_num_row = 8,
+
+    .shift = inv_shift_adst_adst_8,
+    .stage_range_col = inv_stage_range_col_adst_adst_8,
+    .stage_range_row = inv_stage_range_row_adst_adst_8,
+    .cos_bit_col = inv_cos_bit_col_adst_adst_8,
+    .cos_bit_row = inv_cos_bit_row_adst_adst_8,
+    .txfm_func_col = vp10_iadst8_new,
+    .txfm_func_row = vp10_iadst8_new};
+
+//  ---------------- config inv_adst_adst_16 ----------------
+static const int8_t inv_shift_adst_adst_16[2] = {0, -6};
+static const int8_t inv_stage_range_col_adst_adst_16[10] = {18, 18, 18, 18, 18,
+                                                            18, 18, 18, 17, 17};
+static const int8_t inv_stage_range_row_adst_adst_16[10] = {18, 18, 18, 18, 18,
+                                                            18, 18, 18, 18, 18};
+static const int8_t inv_cos_bit_col_adst_adst_16[10] = {14, 14, 14, 14, 14,
+                                                        14, 14, 14, 14, 15};
+static const int8_t inv_cos_bit_row_adst_adst_16[10] = {14, 14, 14, 14, 14,
+                                                        14, 14, 14, 14, 14};
+
+static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_16 = {
+    .txfm_size = 16,
+    .stage_num_col = 10,
+    .stage_num_row = 10,
+
+    .shift = inv_shift_adst_adst_16,
+    .stage_range_col = inv_stage_range_col_adst_adst_16,
+    .stage_range_row = inv_stage_range_row_adst_adst_16,
+    .cos_bit_col = inv_cos_bit_col_adst_adst_16,
+    .cos_bit_row = inv_cos_bit_row_adst_adst_16,
+    .txfm_func_col = vp10_iadst16_new,
+    .txfm_func_row = vp10_iadst16_new};
+
+//  ---------------- config inv_adst_adst_32 ----------------
+static const int8_t inv_shift_adst_adst_32[2] = {-1, -6};
+static const int8_t inv_stage_range_col_adst_adst_32[12] = {
+    18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 17, 17};
+static const int8_t inv_stage_range_row_adst_adst_32[12] = {
+    19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19};
+static const int8_t inv_cos_bit_col_adst_adst_32[12] = {14, 14, 14, 14, 14, 14,
+                                                        14, 14, 14, 14, 14, 15};
+static const int8_t inv_cos_bit_row_adst_adst_32[12] = {13, 13, 13, 13, 13, 13,
+                                                        13, 13, 13, 13, 13, 13};
+
+static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_adst_32 = {
+    .txfm_size = 32,
+    .stage_num_col = 12,
+    .stage_num_row = 12,
+
+    .shift = inv_shift_adst_adst_32,
+    .stage_range_col = inv_stage_range_col_adst_adst_32,
+    .stage_range_row = inv_stage_range_row_adst_adst_32,
+    .cos_bit_col = inv_cos_bit_col_adst_adst_32,
+    .cos_bit_row = inv_cos_bit_row_adst_adst_32,
+    .txfm_func_col = vp10_iadst32_new,
+    .txfm_func_row = vp10_iadst32_new};
+
 #endif  // VP10_INV_TXFM2D_CFG_H_