[mips] Use less registers to load address of TargetExternalSymbol

There is no pattern matched `add hi, (MipsLo texternalsym)`. As a result,
loading an address of 32-bit symbol requires two registers and one more
additional instruction:
```
addiu $1, $zero, %lo(foo)
lui   $2, %hi(foo)
addu  $25, $2, $1
```

This patch adds the missed pattern and enables generation more effective
set of instructions:
```
lui   $1, %hi(foo)
addiu $25, $1, %lo(foo)
```

Differential Revision: https://reviews.llvm.org/D66771

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370196 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td
index 834d9d880b36086cdeb24aedf748b5e954101a66..49413c90d0108c130a295d432e6fa75c032d2e25 100644 (file)
--- a/lib/Target/Mips/MipsInstrInfo.td
+++ b/lib/Target/Mips/MipsInstrInfo.td
@@ -3165,6 +3165,8 @@ multiclass MipsHiLoRelocs<Instruction Lui, Instruction Addiu,
                 (Addiu GPROpnd:$hi, tconstpool:$lo)>;
   def : MipsPat<(add GPROpnd:$hi, (MipsLo tglobaltlsaddr:$lo)),
                 (Addiu GPROpnd:$hi, tglobaltlsaddr:$lo)>;
+  def : MipsPat<(add GPROpnd:$hi, (MipsLo texternalsym:$lo)),
+                (Addiu GPROpnd:$hi, texternalsym:$lo)>;
 }
 
 // wrapper_pic

diff --git a/test/CodeGen/Mips/indirect-jump-hazard/long-calls.ll b/test/CodeGen/Mips/indirect-jump-hazard/long-calls.ll
index 50d8fd6dd1d27bd3fce08ecc71f4f08f0619ed15..5be7bd1897b49ede2f8ff8823867661287ce3be2 100644 (file)
--- a/test/CodeGen/Mips/indirect-jump-hazard/long-calls.ll
+++ b/test/CodeGen/Mips/indirect-jump-hazard/long-calls.ll
@@ -28,11 +28,10 @@ define void @caller() {
 ; O32-NEXT:    addiu $25, $1, %lo(callee)
 ; O32-NEXT:    jalr.hb $25
 ; O32-NEXT:    nop
-; O32-NEXT:    addiu $1, $zero, %lo(memset)
-; O32-NEXT:    lui $2, %hi(memset)
-; O32-NEXT:    addu $25, $2, $1
 ; O32-NEXT:    lui $1, %hi(val)
 ; O32-NEXT:    addiu $4, $1, %lo(val)
+; O32-NEXT:    lui $1, %hi(memset)
+; O32-NEXT:    addiu $25, $1, %lo(memset)
 ; O32-NEXT:    addiu $5, $zero, 0
 ; O32-NEXT:    jalr.hb $25
 ; O32-NEXT:    addiu $6, $zero, 80
@@ -50,11 +49,10 @@ define void @caller() {
 ; N32-NEXT:    addiu $25, $1, %lo(callee)
 ; N32-NEXT:    jalr.hb $25
 ; N32-NEXT:    nop
-; N32-NEXT:    addiu $1, $zero, %lo(memset)
-; N32-NEXT:    lui $2, %hi(memset)
-; N32-NEXT:    addu $25, $2, $1
 ; N32-NEXT:    lui $1, %hi(val)
 ; N32-NEXT:    addiu $4, $1, %lo(val)
+; N32-NEXT:    lui $1, %hi(memset)
+; N32-NEXT:    addiu $25, $1, %lo(memset)
 ; N32-NEXT:    daddiu $5, $zero, 0
 ; N32-NEXT:    jalr.hb $25
 ; N32-NEXT:    daddiu $6, $zero, 80
@@ -83,8 +81,7 @@ define void @caller() {
 ; N64-NEXT:    lui $2, %hi(memset)
 ; N64-NEXT:    daddu $1, $1, $2
 ; N64-NEXT:    dsll $1, $1, 16
-; N64-NEXT:    daddiu $2, $zero, %lo(memset)
-; N64-NEXT:    daddu $25, $1, $2
+; N64-NEXT:    daddiu $25, $1, %lo(memset)
 ; N64-NEXT:    lui $1, %highest(val)
 ; N64-NEXT:    daddiu $1, $1, %higher(val)
 ; N64-NEXT:    dsll $1, $1, 16

diff --git a/test/CodeGen/Mips/long-calls.ll b/test/CodeGen/Mips/long-calls.ll
index d4652a54635f45a1d338322a2d7f1cdd34588c61..9cd868902a06c400fdfd2429a42772f442be5d0a 100644 (file)
--- a/test/CodeGen/Mips/long-calls.ll
+++ b/test/CodeGen/Mips/long-calls.ll
@@ -33,9 +33,8 @@ define void @caller() {
 ; ON32: addiu  $25, $1, %lo(callee)
 ; ON32: jalr   $25
 
-; ON32: addiu  $1, $zero, %lo(memset)
-; ON32: lui    $2, %hi(memset)
-; ON32: addu   $25, $2, $1
+; ON32: lui    $1, %hi(memset)
+; ON32: addiu  $25, $1, %lo(memset)
 ; ON32: jalr   $25
 
 ; ON64: lui     $1, %highest(callee)
@@ -47,8 +46,7 @@ define void @caller() {
 ; ON64: daddiu  $1, $zero, %higher(memset)
 ; ON64: lui     $2, %highest(memset)
 ; ON64: lui     $2, %hi(memset)
-; ON64: daddiu  $2, $zero, %lo(memset)
-; ON64: daddu   $25, $1, $2
+; ON64: daddiu  $25, $1, %lo(memset)
 ; ON64: jalr    $25
 
   call void @callee()