that OS=hpux is the same as CPU=hppa. First steps at doing this.
With these patches, we still work on hppa with either gcc or HP's cc.
We might work on hpux/itanium with gcc, but I can't test it. Definitely
will not work on hpux/itanium with non-gcc compiler, for lack of spinlock
code.
# assembler code in src/include/storage/s_lock.h, so we just use
# a dummy file here.
case $host in
- *-*-hpux*) need_tas=yes; tas_file=hpux.s ;;
+ hppa*-*-hpux*) need_tas=yes; tas_file=hpux_hppa.s ;;
sparc-*-solaris*) need_tas=yes; tas_file=solaris_sparc.s ;;
i?86-*-solaris*) need_tas=yes; tas_file=solaris_i386.s ;;
*) need_tas=no; tas_file=dummy.s ;;
dnl Process this file with autoconf to produce a configure script.
-dnl $Header: /cvsroot/pgsql/configure.in,v 1.271 2003/08/01 03:10:03 momjian Exp $
+dnl $Header: /cvsroot/pgsql/configure.in,v 1.272 2003/08/01 19:12:52 tgl Exp $
dnl
dnl Developers, please strive to achieve this order:
dnl
# assembler code in src/include/storage/s_lock.h, so we just use
# a dummy file here.
case $host in
- *-*-hpux*) need_tas=yes; tas_file=hpux.s ;;
+ hppa*-*-hpux*) need_tas=yes; tas_file=hpux_hppa.s ;;
sparc-*-solaris*) need_tas=yes; tas_file=solaris_sparc.s ;;
i?86-*-solaris*) need_tas=yes; tas_file=solaris_i386.s ;;
*) need_tas=no; tas_file=dummy.s ;;
/*
+ * tas() for HPPA.
+ *
* To generate tas.s using this template:
* 1. cc +O2 -S -c tas.c
* 2. edit tas.s:
* - replace the LDW with LDCWX
+ * 3. install as src/backend/port/tas/hpux_hppa.s.
+ *
* For details about the LDCWX instruction, see the "Precision
* Architecture and Instruction Reference Manual" (09740-90014 of June
* 1987), p. 5-38.
-#define HAS_TEST_AND_SET
-typedef struct
-{
- int sema[4];
-} slock_t;
-
#ifndef BIG_ENDIAN
#define BIG_ENDIAN 4321
#endif
#ifndef PDP_ENDIAN
#define PDP_ENDIAN 3412
#endif
+
+#if defined(__hppa)
+
+#define HAS_TEST_AND_SET
+typedef struct
+{
+ int sema[4];
+} slock_t;
+
#ifndef BYTE_ORDER
#define BYTE_ORDER BIG_ENDIAN
+#endif
+
+#elif defined(__ia64)
+
+#define HAS_TEST_AND_SET
+typedef unsigned int slock_t;
+
+#ifndef BYTE_ORDER
+#define BYTE_ORDER LITTLE_ENDIAN
+#endif
+#else
+#error unrecognized CPU type for HP-UX
#endif
* Portions Copyright (c) 1996-2002, PostgreSQL Global Development Group
* Portions Copyright (c) 1994, Regents of the University of California
*
- * $Id: s_lock.h,v 1.110 2003/07/20 04:31:32 momjian Exp $
+ * $Id: s_lock.h,v 1.111 2003/08/01 19:12:52 tgl Exp $
*
*-------------------------------------------------------------------------
*/
/* Intel Itanium */
-#ifdef __ia64__
+#if defined(__ia64__) || defined(__ia64)
#define TAS(lock) tas(lock)
static __inline__ int
return (int) ret;
}
-#endif /* __ia64__ */
+#endif /* __ia64__ || __ia64 */
#if defined(__arm__) || defined(__arm__)
/*************************************************************************
- * These are the platforms that do not use inline assembler (and hence
- * have common code for gcc and non-gcc compilers, if both are available).
+ * These are the platforms that have only one compiler, or do not use inline
+ * assembler (and hence have common code for gcc and non-gcc compilers,
+ * if both are available).
*/
#endif /* __alpha */
-#if defined(__hpux)
+#if defined(__hppa)
/*
- * HP-UX (PA-RISC)
+ * HP's PA-RISC
*
* Note that slock_t on PA-RISC is a structure instead of char
* (see include/port/hpux.h).
#define S_LOCK_FREE(lock) ( *(int *) (((long) (lock) + 15) & ~15) != 0)
-#endif /* __hpux */
+#endif /* __hppa */
#if defined(__QNX__) && defined(__WATCOMC__)
/*