/// indicates how many separate module file load operations have occurred.
unsigned CurrentGeneration;
+ typedef llvm::DenseMap<unsigned, SwitchCase *> SwitchCaseMapTy;
/// \brief Mapping from switch-case IDs in the chain to switch-case statements
///
/// Statements usually don't have IDs, but switch cases need them, so that the
/// switch statement can refer to them.
- std::map<unsigned, SwitchCase *> SwitchCaseStmts;
+ SwitchCaseMapTy SwitchCaseStmts;
- std::map<unsigned, SwitchCase *> *CurrSwitchCaseStmts;
+ SwitchCaseMapTy *CurrSwitchCaseStmts;
/// \brief The number of stat() calls that hit/missed the stat
/// cache.
SmallVector<Stmt *, 16> *CollectedStmts;
/// \brief Mapping from SwitchCase statements to IDs.
- std::map<SwitchCase *, unsigned> SwitchCaseIDs;
+ llvm::DenseMap<SwitchCase *, unsigned> SwitchCaseIDs;
/// \brief The number of statements written to the AST file.
unsigned NumStatements;
// In practice, this won't be executed (since method definitions
// don't occur in header files).
// Switch case IDs for this method body.
- std::map<unsigned, SwitchCase *> SwitchCaseStmtsForObjCMethod;
- SaveAndRestore<std::map<unsigned, SwitchCase *> *>
+ ASTReader::SwitchCaseMapTy SwitchCaseStmtsForObjCMethod;
+ SaveAndRestore<ASTReader::SwitchCaseMapTy *>
SCFOM(Reader.CurrSwitchCaseStmts, &SwitchCaseStmtsForObjCMethod);
MD->setBody(Reader.ReadStmt(F));
MD->setSelfDecl(ReadDeclAs<ImplicitParamDecl>(Record, Idx));