[X86] Support -march=tigerlake

Support -march=tigerlake for x86.
Compare with Icelake Client, It include 4 more new features ,they are
avx512vp2intersect, movdiri, movdir64b, shstk.

Patch by Xiang Zhang (xiangzhangllvm)

Differential Revision: https://reviews.llvm.org/D65840

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@368543 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/clang/Basic/X86Target.def b/include/clang/Basic/X86Target.def
index 94ccb9fd8b2f58d81a8694e791930d313ba0b3fb..7baacca6da8e800b7a4a19f99cd2ebafa129d9a1 100644 (file)
--- a/include/clang/Basic/X86Target.def
+++ b/include/clang/Basic/X86Target.def
@@ -173,6 +173,10 @@ PROC(IcelakeClient, "icelake-client", PROC_64_BIT)
 /// Icelake server microarchitecture based processors.
 PROC(IcelakeServer, "icelake-server", PROC_64_BIT)
 
+/// \name Tigerlake Server
+/// Tigerlake Server microarchitecture based processors.
+PROC(Tigerlake, "tigerlake", PROC_64_BIT)
+
 /// \name Knights Landing
 /// Knights Landing processor.
 PROC_WITH_FEAT(KNL, "knl", PROC_64_BIT, FEATURE_AVX512F)
@@ -297,6 +301,7 @@ FEATURE(FEATURE_VPCLMULQDQ)
 FEATURE(FEATURE_AVX512VNNI)
 FEATURE(FEATURE_AVX512BITALG)
 FEATURE(FEATURE_AVX512BF16)
+FEATURE(FEATURE_AVX512VP2INTERSECT)
 
 
 // FIXME: When commented out features are supported in LLVM, enable them here.

diff --git a/lib/Basic/Targets/X86.cpp b/lib/Basic/Targets/X86.cpp
index 786cd8e5a72c04b5355d2c795fc0dd83825492ee..a010b5a36fa1a51f480aec46903baf8f7c24c1b4 100644 (file)
--- a/lib/Basic/Targets/X86.cpp
+++ b/lib/Basic/Targets/X86.cpp
@@ -157,11 +157,20 @@ bool X86TargetInfo::initFeatureMap(
     // SkylakeServer cores inherits all SKL features, except SGX
     goto SkylakeCommon;
 
+  case CK_Tigerlake:
+    setFeatureEnabledImpl(Features, "avx512vp2intersect", true);
+    setFeatureEnabledImpl(Features, "movdiri", true);
+    setFeatureEnabledImpl(Features, "movdir64b", true);
+    setFeatureEnabledImpl(Features, "shstk", true);
+    // Tigerlake cores inherits IcelakeClient, except pconfig and wbnoinvd
+    goto IcelakeCommon;
+
   case CK_IcelakeServer:
     setFeatureEnabledImpl(Features, "pconfig", true);
     setFeatureEnabledImpl(Features, "wbnoinvd", true);
     LLVM_FALLTHROUGH;
   case CK_IcelakeClient:
+IcelakeCommon:
     setFeatureEnabledImpl(Features, "vaes", true);
     setFeatureEnabledImpl(Features, "gfni", true);
     setFeatureEnabledImpl(Features, "vpclmulqdq", true);
@@ -1000,6 +1009,7 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
   case CK_Cannonlake:
   case CK_IcelakeClient:
   case CK_IcelakeServer:
+  case CK_Tigerlake:
     // FIXME: Historically, we defined this legacy name, it would be nice to
     // remove it at some point. We've never exposed fine-grained names for
     // recent primary x86 CPUs, and we should keep it that way.

diff --git a/test/Driver/x86-march.c b/test/Driver/x86-march.c
index ba900bb4920a81df1a1cdbb3ad752bd9d78517a8..87fdf624a9698e01ceee3235a295f8d7544fa6f9 100644 (file)
--- a/test/Driver/x86-march.c
+++ b/test/Driver/x86-march.c
@@ -76,6 +76,10 @@
 // RUN:   | FileCheck %s -check-prefix=icelake-server
 // icelake-server: "-target-cpu" "icelake-server"
 //
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=tigerlake 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=tigerlake
+// tigerlake: "-target-cpu" "tigerlake"
+//
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=lakemont 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=lakemont
 // lakemont: "-target-cpu" "lakemont"

diff --git a/test/Misc/target-invalid-cpu-note.c b/test/Misc/target-invalid-cpu-note.c
index 2831aaefa0d38a84f78144ad73582668f2ed39ad..e7dc6ed478b6d09e27ffd32300de573ae74af01d 100644 (file)
--- a/test/Misc/target-invalid-cpu-note.c
+++ b/test/Misc/target-invalid-cpu-note.c
@@ -16,7 +16,7 @@
 // X86-SAME: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont,
 // X86-SAME: nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge,
 // X86-SAME: core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512,
-// X86-SAME: skx, cascadelake, cooperlake, cannonlake, icelake-client, icelake-server, knl, knm, lakemont, k6, k6-2, k6-3,
+// X86-SAME: skx, cascadelake, cooperlake, cannonlake, icelake-client, icelake-server, tigerlake, knl, knm, lakemont, k6, k6-2, k6-3,
 // X86-SAME: athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64,
 // X86-SAME: athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10,
 // X86-SAME: barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2,
@@ -28,7 +28,7 @@
 // X86_64-SAME: atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere,
 // X86_64-SAME: sandybridge, corei7-avx, ivybridge, core-avx-i, haswell,
 // X86_64-SAME: core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake,
-// X86_64-SAME: icelake-client, icelake-server, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3,
+// X86_64-SAME: icelake-client, icelake-server, tigerlake, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3,
 // X86_64-SAME: athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1,
 // X86_64-SAME: btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, x86-64
 

diff --git a/test/Preprocessor/predefined-arch-macros.c b/test/Preprocessor/predefined-arch-macros.c
index 4b3f2339d49803de7849f051c7730c2bd8cb4f02..b21d6f5ead88c8ea4b2252b9fda6503feae38850 100644 (file)
--- a/test/Preprocessor/predefined-arch-macros.c
+++ b/test/Preprocessor/predefined-arch-macros.c
@@ -1517,6 +1517,133 @@
 // CHECK_ICX_M64: #define __x86_64 1
 // CHECK_ICX_M64: #define __x86_64__ 1
 
+// RUN: %clang -march=tigerlake -m32 -E -dM %s -o - 2>&1 \
+// RUN:     -target i386-unknown-linux \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_TGL_M32
+// CHECK_TGL_M32: #define __AES__ 1
+// CHECK_TGL_M32: #define __AVX2__ 1
+// CHECK_TGL_M32: #define __AVX512BITALG__ 1
+// CHECK_TGL_M32: #define __AVX512BW__ 1
+// CHECK_TGL_M32: #define __AVX512CD__ 1
+// CHECK_TGL_M32: #define __AVX512DQ__ 1
+// CHECK_TGL_M32: #define __AVX512F__ 1
+// CHECK_TGL_M32: #define __AVX512IFMA__ 1
+// CHECK_TGL_M32: #define __AVX512VBMI2__ 1
+// CHECK_TGL_M32: #define __AVX512VBMI__ 1
+// CHECK_TGL_M32: #define __AVX512VL__ 1
+// CHECK_TGL_M32: #define __AVX512VNNI__ 1
+// CHECK_TGL_M32: #define __AVX512VP2INTERSECT__ 1
+// CHECK_TGL_M32: #define __AVX512VPOPCNTDQ__ 1
+// CHECK_TGL_M32: #define __AVX__ 1
+// CHECK_TGL_M32: #define __BMI2__ 1
+// CHECK_TGL_M32: #define __BMI__ 1
+// CHECK_TGL_M32: #define __CLFLUSHOPT__ 1
+// CHECK_TGL_M32: #define __CLWB__ 1
+// CHECK_TGL_M32: #define __F16C__ 1
+// CHECK_TGL_M32: #define __FMA__ 1
+// CHECK_TGL_M32: #define __GFNI__ 1
+// CHECK_TGL_M32: #define __INVPCID__ 1
+// CHECK_TGL_M32: #define __LZCNT__ 1
+// CHECK_TGL_M32: #define __MMX__ 1
+// CHECK_TGL_M32: #define __MOVBE__ 1
+// CHECK_TGL_M32: #define __MOVDIR64B__ 1
+// CHECK_TGL_M32: #define __MOVDIRI__ 1
+// CHECK_TGL_M32: #define __MPX__ 1
+// CHECK_TGL_M32: #define __PCLMUL__ 1
+// CHECK_TGL_M32-NOT: #define __PCONFIG__ 1
+// CHECK_TGL_M32: #define __PKU__ 1
+// CHECK_TGL_M32: #define __POPCNT__ 1
+// CHECK_TGL_M32: #define __PRFCHW__ 1
+// CHECK_TGL_M32: #define __RDPID__ 1
+// CHECK_TGL_M32: #define __RDRND__ 1
+// CHECK_TGL_M32: #define __RDSEED__ 1
+// CHECK_TGL_M32: #define __SGX__ 1
+// CHECK_TGL_M32: #define __SHA__ 1
+// CHECK_TGL_M32: #define __SHSTK__ 1
+// CHECK_TGL_M32: #define __SSE2__ 1
+// CHECK_TGL_M32: #define __SSE3__ 1
+// CHECK_TGL_M32: #define __SSE4_1__ 1
+// CHECK_TGL_M32: #define __SSE4_2__ 1
+// CHECK_TGL_M32: #define __SSE__ 1
+// CHECK_TGL_M32: #define __SSSE3__ 1
+// CHECK_TGL_M32: #define __VAES__ 1
+// CHECK_TGL_M32: #define __VPCLMULQDQ__ 1
+// CHECK_TGL_M32-NOT: #define __WBNOINVD__ 1
+// CHECK_TGL_M32: #define __XSAVEC__ 1
+// CHECK_TGL_M32: #define __XSAVEOPT__ 1
+// CHECK_TGL_M32: #define __XSAVES__ 1
+// CHECK_TGL_M32: #define __XSAVE__ 1
+// CHECK_TGL_M32: #define __corei7 1
+// CHECK_TGL_M32: #define __corei7__ 1
+// CHECK_TGL_M32: #define __i386 1
+// CHECK_TGL_M32: #define __i386__ 1
+// CHECK_TGL_M32: #define __tune_corei7__ 1
+// CHECK_TGL_M32: #define i386 1
+
+// RUN: %clang -march=tigerlake -m64 -E -dM %s -o - 2>&1 \
+// RUN:     -target i386-unknown-linux \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_TGL_M64
+// CHECK_TGL_M64: #define __AES__ 1
+// CHECK_TGL_M64: #define __AVX2__ 1
+// CHECK_TGL_M64: #define __AVX512BITALG__ 1
+// CHECK_TGL_M64: #define __AVX512BW__ 1
+// CHECK_TGL_M64: #define __AVX512CD__ 1
+// CHECK_TGL_M64: #define __AVX512DQ__ 1
+// CHECK_TGL_M64: #define __AVX512F__ 1
+// CHECK_TGL_M64: #define __AVX512IFMA__ 1
+// CHECK_TGL_M64: #define __AVX512VBMI2__ 1
+// CHECK_TGL_M64: #define __AVX512VBMI__ 1
+// CHECK_TGL_M64: #define __AVX512VL__ 1
+// CHECK_TGL_M64: #define __AVX512VNNI__ 1
+// CHECK_TGL_M64: #define __AVX512VP2INTERSECT__ 1
+// CHECK_TGL_M64: #define __AVX512VPOPCNTDQ__ 1
+// CHECK_TGL_M64: #define __AVX__ 1
+// CHECK_TGL_M64: #define __BMI2__ 1
+// CHECK_TGL_M64: #define __BMI__ 1
+// CHECK_TGL_M64: #define __CLFLUSHOPT__ 1
+// CHECK_TGL_M64: #define __CLWB__ 1
+// CHECK_TGL_M64: #define __F16C__ 1
+// CHECK_TGL_M64: #define __FMA__ 1
+// CHECK_TGL_M64: #define __GFNI__ 1
+// CHECK_TGL_M64: #define __INVPCID__ 1
+// CHECK_TGL_M64: #define __LZCNT__ 1
+// CHECK_TGL_M64: #define __MMX__ 1
+// CHECK_TGL_M64: #define __MOVBE__ 1
+// CHECK_TGL_M64: #define __MOVDIR64B__ 1
+// CHECK_TGL_M64: #define __MOVDIRI__ 1
+// CHECK_TGL_M64: #define __MPX__ 1
+// CHECK_TGL_M64: #define __PCLMUL__ 1
+// CHECK_TGL_M64-NOT: #define __PCONFIG__ 1
+// CHECK_TGL_M64: #define __PKU__ 1
+// CHECK_TGL_M64: #define __POPCNT__ 1
+// CHECK_TGL_M64: #define __PRFCHW__ 1
+// CHECK_TGL_M64: #define __RDPID__ 1
+// CHECK_TGL_M64: #define __RDRND__ 1
+// CHECK_TGL_M64: #define __RDSEED__ 1
+// CHECK_TGL_M64: #define __SGX__ 1
+// CHECK_TGL_M64: #define __SHA__ 1
+// CHECK_TGL_M64: #define __SHSTK__ 1
+// CHECK_TGL_M64: #define __SSE2__ 1
+// CHECK_TGL_M64: #define __SSE3__ 1
+// CHECK_TGL_M64: #define __SSE4_1__ 1
+// CHECK_TGL_M64: #define __SSE4_2__ 1
+// CHECK_TGL_M64: #define __SSE__ 1
+// CHECK_TGL_M64: #define __SSSE3__ 1
+// CHECK_TGL_M64: #define __VAES__ 1
+// CHECK_TGL_M64: #define __VPCLMULQDQ__ 1
+// CHECK_TGL_M64-NOT: #define __WBNOINVD__ 1
+// CHECK_TGL_M64: #define __XSAVEC__ 1
+// CHECK_TGL_M64: #define __XSAVEOPT__ 1
+// CHECK_TGL_M64: #define __XSAVES__ 1
+// CHECK_TGL_M64: #define __XSAVE__ 1
+// CHECK_TGL_M64: #define __amd64 1
+// CHECK_TGL_M64: #define __amd64__ 1
+// CHECK_TGL_M64: #define __corei7 1
+// CHECK_TGL_M64: #define __corei7__ 1
+// CHECK_TGL_M64: #define __tune_corei7__ 1
+// CHECK_TGL_M64: #define __x86_64 1
+// CHECK_TGL_M64: #define __x86_64__ 1
+
 // RUN: %clang -march=atom -m32 -E -dM %s -o - 2>&1 \
 // RUN:     -target i386-unknown-linux \
 // RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_ATOM_M32