Adjust a test that's expecting optimizations to be done

on MMX palignr; we don't do this for the intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@113234 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/palignr.c b/test/CodeGen/palignr.c
index e9c1dbd012b589fa1c64da351c68c075896c62b3..ed86c9ec13cb86fba139e8daf6ec8392f496adaf 100644 (file)
--- a/test/CodeGen/palignr.c
+++ b/test/CodeGen/palignr.c
@@ -17,13 +17,13 @@ int4 align4(int4 a, int4 b) { return _mm_alignr_epi8(a, b, 32); }
 #define _mm_alignr_pi8(a, b, n) (__builtin_ia32_palignr((a), (b), (n)))
 typedef __attribute__((vector_size(8))) int int2;
 
-// CHECK-NOT: palignr
+// CHECK: palignr
 int2 align5(int2 a, int2 b) { return _mm_alignr_pi8(a, b, 8); }
 
-// CHECK: psrlq
+// CHECK: palignr
 int2 align6(int2 a, int2 b) { return _mm_alignr_pi8(a, b, 9); }
 
-// CHECK: xor
+// CHECK: palignr
 int2 align7(int2 a, int2 b) { return _mm_alignr_pi8(a, b, 16); }
 
 // CHECK: palignr