%res1 = insertelement <2 x float> %res0, float %op1, i32 1
ret <2 x float> %res1
}
+
+define <4 x float> @PR34111(<4 x float> %a) {
+; SSE3-LABEL: PR34111:
+; SSE3: # BB#0:
+; SSE3-NEXT: movaps %xmm0, %xmm1
+; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,2,3]
+; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3,2,3]
+; SSE3-NEXT: addps %xmm1, %xmm0
+; SSE3-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
+; SSE3-NEXT: retq
+;
+; AVX-LABEL: PR34111:
+; AVX: # BB#0:
+; AVX-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,2,2,3]
+; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,3,2,3]
+; AVX-NEXT: vaddps %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
+; AVX-NEXT: retq
+ %a02 = shufflevector <4 x float> %a, <4 x float> undef, <2 x i32> <i32 0, i32 2>
+ %a13 = shufflevector <4 x float> %a, <4 x float> undef, <2 x i32> <i32 1, i32 3>
+ %add = fadd <2 x float> %a02, %a13
+ %hadd = shufflevector <2 x float> %add, <2 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>
+ ret <4 x float> %hadd
+}
+