]> granicus.if.org Git - llvm/commitdiff
[X86][MMX] Remove the (long time) unused MMX_PINSRW ISD opcode.
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 9 Feb 2017 17:08:47 +0000 (17:08 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 9 Feb 2017 17:08:47 +0000 (17:08 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294596 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86ISelLowering.h

index 1ca1402a1a9e656ec79ec066fa571797137fd480..d95227dc4398807874972ec65433a782bfdd3e41 100644 (file)
@@ -23800,7 +23800,6 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
   case X86ISD::INSERTPS:           return "X86ISD::INSERTPS";
   case X86ISD::PINSRB:             return "X86ISD::PINSRB";
   case X86ISD::PINSRW:             return "X86ISD::PINSRW";
-  case X86ISD::MMX_PINSRW:         return "X86ISD::MMX_PINSRW";
   case X86ISD::PSHUFB:             return "X86ISD::PSHUFB";
   case X86ISD::ANDNP:              return "X86ISD::ANDNP";
   case X86ISD::BLENDI:             return "X86ISD::BLENDI";
index 4797a3dca38f8c8fa0baed72d2aa35466dec9b93..734e79f2b2b69f309e20237765da71fe5fe45b05 100644 (file)
@@ -179,7 +179,7 @@ namespace llvm {
 
       /// Insert the lower 16-bits of a 32-bit value to a vector,
       /// corresponds to X86::PINSRW.
-      PINSRW, MMX_PINSRW,
+      PINSRW,
 
       /// Shuffle 16 8-bit values within a vector.
       PSHUFB,