]> granicus.if.org Git - llvm/commitdiff
[AVX-512][InstCombine] Teach InstCombineCalls how to simplify demanded for scalar...
authorCraig Topper <craig.topper@gmail.com>
Sun, 11 Dec 2016 07:42:04 +0000 (07:42 +0000)
committerCraig Topper <craig.topper@gmail.com>
Sun, 11 Dec 2016 07:42:04 +0000 (07:42 +0000)
These intrinsics don't read the upper elements of their first and second input. These are slightly different the the SSE version which does use the upper bits of its first element as passthru bits since the result goes to an XMM register. For AVX-512 the result goes to a mask register instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289371 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Transforms/InstCombine/InstCombineCalls.cpp

index 3f666bcdc7d653a871092e2655442e5391311d07..d87ac44b41573e55e139127de7ca60871c235120 100644 (file)
@@ -1738,7 +1738,9 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
   case Intrinsic::x86_sse2_ucomigt_sd:
   case Intrinsic::x86_sse2_ucomile_sd:
   case Intrinsic::x86_sse2_ucomilt_sd:
-  case Intrinsic::x86_sse2_ucomineq_sd: {
+  case Intrinsic::x86_sse2_ucomineq_sd:
+  case Intrinsic::x86_avx512_mask_cmp_ss:
+  case Intrinsic::x86_avx512_mask_cmp_sd: {
     // These intrinsics only demand the 0th element of their input vectors. If
     // we can simplify the input based on that, do so now.
     bool MadeChange = false;