]> granicus.if.org Git - clang/commitdiff
[X86] Disable CLWB in Cannon Lake
authorCraig Topper <craig.topper@intel.com>
Wed, 21 Feb 2018 00:16:50 +0000 (00:16 +0000)
committerCraig Topper <craig.topper@intel.com>
Wed, 21 Feb 2018 00:16:50 +0000 (00:16 +0000)
Cannon Lake does not support CLWB, therefore it
does not include all features listed under SKX.

Patch by Gabor Buella

Differential Revision: https://reviews.llvm.org/D43459

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@325655 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Basic/Targets/X86.cpp
test/Preprocessor/predefined-arch-macros.c

index f3ebbe632baabe802411c80699d1b5c68da8da5e..ab76c775ce62450ab6bca3ff49cbdaeaaa786ce1 100644 (file)
@@ -175,7 +175,8 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "avx512bw", true);
     setFeatureEnabledImpl(Features, "avx512vl", true);
     setFeatureEnabledImpl(Features, "pku", true);
-    setFeatureEnabledImpl(Features, "clwb", true);
+    if (Kind != CK_Cannonlake) // CNL inherits all SKX features, except CLWB
+      setFeatureEnabledImpl(Features, "clwb", true);
     LLVM_FALLTHROUGH;
   case CK_SkylakeClient:
     setFeatureEnabledImpl(Features, "xsavec", true);
index ba3cb44b697b7b480f2f72b19e0df01dd616a91e..ba9a5e9c8a3f5b7bcf08418b1abfde405a795cbe 100644 (file)
 // CHECK_CNL_M32: #define __BMI2__ 1
 // CHECK_CNL_M32: #define __BMI__ 1
 // CHECK_CNL_M32: #define __CLFLUSHOPT__ 1
-// CHECK_CNL_M32: #define __CLWB__ 1
+// CHECK_CNL_M32-NOT: #define __CLWB__ 1
 // CHECK_CNL_M32: #define __F16C__ 1
 // CHECK_CNL_M32: #define __FMA__ 1
 // CHECK_CNL_M32: #define __LZCNT__ 1
 // CHECK_CNL_M64: #define __BMI2__ 1
 // CHECK_CNL_M64: #define __BMI__ 1
 // CHECK_CNL_M64: #define __CLFLUSHOPT__ 1
-// CHECK_CNL_M64: #define __CLWB__ 1
+// CHECK_CNL_M64-NOT: #define __CLWB__ 1
 // CHECK_CNL_M64: #define __F16C__ 1
 // CHECK_CNL_M64: #define __FMA__ 1
 // CHECK_CNL_M64: #define __LZCNT__ 1