]> granicus.if.org Git - llvm/commitdiff
[AArch64] Enable merging of adjacent zero stores for all subtargets.
authorChad Rosier <mcrosier@codeaurora.org>
Fri, 11 Nov 2016 14:10:12 +0000 (14:10 +0000)
committerChad Rosier <mcrosier@codeaurora.org>
Fri, 11 Nov 2016 14:10:12 +0000 (14:10 +0000)
This optimization merges adjacent zero stores into a wider store.

e.g.,

strh wzr, [x0]
strh wzr, [x0, #2]
; becomes
str wzr, [x0]

e.g.,

str wzr, [x0]
str wzr, [x0, #4]
; becomes
str xzr, [x0]

Previously, this was only enabled for Kryo and Cortex-A57.

Differential Revision: https://reviews.llvm.org/D26396

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286592 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AArch64/AArch64.td
lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
lib/Target/AArch64/AArch64Subtarget.h
test/CodeGen/AArch64/arm64-narrow-st-merge.ll

index 5e658272de8fa62ac192419ec2a1d598d14fe61f..b7f473f358b90f995d7b5554fe16bafa730f30c6 100644 (file)
@@ -61,11 +61,6 @@ def FeatureReserveX18 : SubtargetFeature<"reserve-x18", "ReserveX18", "true",
                                          "Reserve X18, making it unavailable "
                                          "as a GPR">;
 
-def FeatureMergeNarrowZeroSt : SubtargetFeature<"merge-narrow-zero-st",
-                                                "MergeNarrowZeroStores", "true",
-                                                "Merge narrow zero store "
-                                                "instructions">;
-
 def FeatureUseAA : SubtargetFeature<"use-aa", "UseAA", "true",
                                     "Use alias analysis during codegen">;
 
@@ -182,7 +177,6 @@ def ProcA57     : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
                                    FeatureCrypto,
                                    FeatureCustomCheapAsMoveHandling,
                                    FeatureFPARMv8,
-                                   FeatureMergeNarrowZeroSt,
                                    FeatureNEON,
                                    FeaturePerfMon,
                                    FeaturePostRAScheduler,
@@ -253,7 +247,6 @@ def ProcKryo    : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo",
                                    FeatureCrypto,
                                    FeatureCustomCheapAsMoveHandling,
                                    FeatureFPARMv8,
-                                   FeatureMergeNarrowZeroSt,
                                    FeatureNEON,
                                    FeaturePerfMon,
                                    FeaturePostRAScheduler,
index 3fe589fe7f39d086fba13882264fd327a79d0b2c..fc5ed6e9c8cfe5b54fdd3e21deff65595eb28868 100644 (file)
@@ -1699,8 +1699,7 @@ bool AArch64LoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
   UsedRegs.resize(TRI->getNumRegs());
 
   bool Modified = false;
-  bool enableNarrowZeroStOpt =
-      Subtarget->mergeNarrowStores() && !Subtarget->requiresStrictAlign();
+  bool enableNarrowZeroStOpt = !Subtarget->requiresStrictAlign();
   for (auto &MBB : Fn)
     Modified |= optimizeBlock(MBB, enableNarrowZeroStOpt);
 
index 359e68904b1c2c1fde2b265815014a245ad131ef..e053d0d70fbe14f1a3f7deddad1b0824dbb1b79d 100644 (file)
@@ -71,7 +71,6 @@ protected:
 
   // StrictAlign - Disallow unaligned memory accesses.
   bool StrictAlign = false;
-  bool MergeNarrowZeroStores = false;
   bool UseAA = false;
   bool PredictableSelectIsExpensive = false;
   bool BalanceFPOps = false;
@@ -179,7 +178,6 @@ public:
   bool hasCrypto() const { return HasCrypto; }
   bool hasCRC() const { return HasCRC; }
   bool hasRAS() const { return HasRAS; }
-  bool mergeNarrowStores() const { return MergeNarrowZeroStores; }
   bool balanceFPOps() const { return BalanceFPOps; }
   bool predictableSelectIsExpensive() const {
     return PredictableSelectIsExpensive;
index 5800dfce58747655db648fb35e47ebb5c4081b0d..4158bcc11e6de48f1c5b080106ef94e1437ea653 100644 (file)
@@ -1,6 +1,4 @@
-; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=cortex-a57 -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple aarch64_be--none-eabi -mcpu=cortex-a57 -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=kryo -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -verify-machineinstrs | FileCheck %s
 
 ; CHECK-LABEL: Strh_zero
 ; CHECK: str wzr