[AArch64][GlobalISel] Test default regbank mapping for G_ICMP.

Also relax a RegisterBankInfo verifier check that's incompatible with
1-bit mappings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281735 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp b/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
index 20015ae82fda036e970c5043ce80a048ef71c4dd..91681fb7a4091665ac0d1029fd5da530584b7bb0 100644 (file)
--- a/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
+++ b/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
@@ -390,7 +390,7 @@ void RegisterBankInfo::PartialMapping::dump() const {
 bool RegisterBankInfo::PartialMapping::verify() const {
   assert(RegBank && "Register bank not set");
   assert(Length && "Empty mapping");
-  assert((StartIdx < getHighBitIdx()) && "Overflow, switch to APInt?");
+  assert((StartIdx <= getHighBitIdx()) && "Overflow, switch to APInt?");
   // Check if the minimum width fits into RegBank.
   assert(RegBank->getSize() >= Length && "Register bank too small for Mask");
   return true;

diff --git a/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir b/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
index 12edd40dd44e67c2cd83e8d9b44bc9f7c5e73a0f..9fbe25e50feaa3342f2caf903a2369f76d889c52 100644 (file)
--- a/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
+++ b/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
@@ -35,6 +35,9 @@
   define void @test_constant_s32() { ret void }
   define void @test_constant_p0() { ret void }
 
+  define void @test_icmp_s32() { ret void }
+  define void @test_icmp_p0() { ret void }
+
   define void @test_frame_index_p0() {
     %ptr0 = alloca i64
     ret void
@@ -493,6 +496,44 @@ body: |
     %0(p0) = G_CONSTANT 0
 ...
 
+---
+# CHECK-LABEL: name: test_icmp_s32
+name:            test_icmp_s32
+legalized:       true
+# CHECK: registers:
+# CHECK:   - { id: 0, class: gpr }
+# CHECK:   - { id: 1, class: gpr }
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+body: |
+  bb.0:
+    liveins: %w0
+    ; CHECK:      %0(s32) = COPY %w0
+    ; CHECK:      %1(s1) = G_ICMP intpred(ne), %0(s32), %0
+    %0(s32) = COPY %w0
+    %1(s1) = G_ICMP intpred(ne), %0, %0
+...
+
+---
+# CHECK-LABEL: name: test_icmp_p0
+name:            test_icmp_p0
+legalized:       true
+# CHECK: registers:
+# CHECK:   - { id: 0, class: gpr }
+# CHECK:   - { id: 1, class: gpr }
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+body: |
+  bb.0:
+    liveins: %x0
+    ; CHECK:      %0(p0) = COPY %x0
+    ; CHECK:      %1(s1) = G_ICMP intpred(ne), %0(p0), %0
+    %0(p0) = COPY %x0
+    %1(s1) = G_ICMP intpred(ne), %0, %0
+...
+
 ---
 # CHECK-LABEL: name: test_frame_index_p0
 name:            test_frame_index_p0