SDValue SystemZTargetLowering::combineFP_ROUND(
SDNode *N, DAGCombinerInfo &DCI) const {
+
+ if (!Subtarget.hasVector())
+ return SDValue();
+
// (fpround (extract_vector_elt X 0))
// (fpround (extract_vector_elt X 1)) ->
// (extract_vector_elt (VROUND X) 0)
SDValue SystemZTargetLowering::combineFP_EXTEND(
SDNode *N, DAGCombinerInfo &DCI) const {
+
+ if (!Subtarget.hasVector())
+ return SDValue();
+
// (fpextend (extract_vector_elt X 0))
// (fpextend (extract_vector_elt X 2)) ->
// (extract_vector_elt (VEXTEND X) 0)
--- /dev/null
+# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z10 -start-before=codegenprepare %s \
+# RUN: -o - | FileCheck %s
+
+# Test that VEXTEND or VROUND nodes are not emitted without vector support.
+
+--- |
+
+ @.str = external dso_local unnamed_addr constant [21 x i8], align 2
+
+ define void @fun1() #0 {
+ bb:
+ %tmp = load <4 x float>, <4 x float>* undef, align 16
+ %tmp1 = extractelement <4 x float> %tmp, i32 0
+ %tmp2 = fpext float %tmp1 to double
+ %tmp3 = extractelement <4 x float> %tmp, i32 2
+ %tmp4 = fpext float %tmp3 to double
+ tail call void (i8*, ...) @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), double %tmp2, double undef, double %tmp4, double undef)
+ ret void
+ }
+
+ define void @fun2() #0 {
+ bb:
+ %tmp = load <2 x double>, <2 x double>* undef, align 16
+ %tmp1 = extractelement <2 x double> %tmp, i32 0
+ %tmp2 = fptrunc double %tmp1 to float
+ %tmp3 = extractelement <2 x double> %tmp, i32 1
+ %tmp4 = fptrunc double %tmp3 to float
+ tail call void (i8*, ...) @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), float %tmp2, float undef, float %tmp4, float undef)
+ ret void
+ }
+
+ declare dso_local void @printf(i8*, ...) #0
+
+...
+
+# CHECK-LABEL: fun1:
+# CHECK: ldeb
+# CHECK-LABEL: fun2:
+# CHECK: ledbr
+
+---
+name: fun1
+alignment: 4
+tracksRegLiveness: true
+...
+---
+name: fun2
+alignment: 4
+tracksRegLiveness: true
+...