[X86] Use C style comments in intrinsic headers for overall consistency.

Most of the origial comments used C style /* */ comments, but some C++ // comments had snuck in over time.

Still need to convert all the doxygen comments. Which is much harder to do.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@333603 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Headers/avx512erintrin.h b/lib/Headers/avx512erintrin.h
index 8ff212c42211029e4f56d9f975bfbf6bede06a63..d02cb3634d2861a8a77d36fc9836f47ebe8897fe 100644 (file)
--- a/lib/Headers/avx512erintrin.h
+++ b/lib/Headers/avx512erintrin.h
@@ -27,7 +27,7 @@
 #ifndef __AVX512ERINTRIN_H
 #define __AVX512ERINTRIN_H
 
-// exp2a23
+/* exp2a23 */
 #define _mm512_exp2a23_round_pd(A, R) __extension__ ({ \
   (__m512d)__builtin_ia32_exp2pd_mask((__v8df)(__m512d)(A), \
                                       (__v8df)_mm512_setzero_pd(), \
@@ -76,7 +76,7 @@
 #define _mm512_maskz_exp2a23_ps(M, A) \
   _mm512_maskz_exp2a23_round_ps((M), (A), _MM_FROUND_CUR_DIRECTION)
 
-// rsqrt28
+/* rsqrt28 */
 #define _mm512_rsqrt28_round_pd(A, R) __extension__ ({ \
   (__m512d)__builtin_ia32_rsqrt28pd_mask((__v8df)(__m512d)(A), \
                                          (__v8df)_mm512_setzero_pd(), \
@@ -179,7 +179,7 @@
 #define _mm_maskz_rsqrt28_sd(M, A, B) \
   _mm_maskz_rsqrt28_round_sd((M), (A), (B), _MM_FROUND_CUR_DIRECTION)
 
-// rcp28
+/* rcp28 */
 #define _mm512_rcp28_round_pd(A, R) __extension__ ({ \
   (__m512d)__builtin_ia32_rcp28pd_mask((__v8df)(__m512d)(A), \
                                        (__v8df)_mm512_setzero_pd(), \
@@ -282,4 +282,4 @@
 #define _mm_maskz_rcp28_sd(M, A, B) \
   _mm_maskz_rcp28_round_sd((M), (A), (B), _MM_FROUND_CUR_DIRECTION)
 
-#endif // __AVX512ERINTRIN_H
+#endif /* __AVX512ERINTRIN_H */

diff --git a/lib/Headers/avx512fintrin.h b/lib/Headers/avx512fintrin.h
index f604d447a162604a7879edbec0b2d4c6f81022d0..f8cfc30a6b1febdcb44b09af624602f01efba26f 100644 (file)
--- a/lib/Headers/avx512fintrin.h
+++ b/lib/Headers/avx512fintrin.h
@@ -9651,19 +9651,20 @@ _mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A)
   return (__m512d)_mm512_mask_and_epi64((__v8di)__W, __K, _mm512_set1_epi64(0x7FFFFFFFFFFFFFFF),(__v8di)__A);
 }
 
-// Vector-reduction arithmetic accepts vectors as inputs and produces scalars as
-// outputs. This class of vector operation forms the basis of many scientific
-// computations. In vector-reduction arithmetic, the evaluation off is
-// independent of the order of the input elements of V.
-
-// Used bisection method. At each step, we partition the vector with previous
-// step in half, and the operation is performed on its two halves.
-// This takes log2(n) steps where n is the number of elements in the vector.
-
-// Vec512 - Vector with size 512.
-// Operator - Can be one of following: +,*,&,|
-// T2  - Can get 'i' for int and 'f' for float.
-// T1 - Can get 'i' for int and 'd' for double.
+/* Vector-reduction arithmetic accepts vectors as inputs and produces scalars as
+ * outputs. This class of vector operation forms the basis of many scientific
+ * computations. In vector-reduction arithmetic, the evaluation off is
+ * independent of the order of the input elements of V.
+
+ * Used bisection method. At each step, we partition the vector with previous
+ * step in half, and the operation is performed on its two halves.
+ * This takes log2(n) steps where n is the number of elements in the vector.
+
+ * Vec512 - Vector with size 512.
+ * Operator - Can be one of following: +,*,&,|
+ * T2  - Can get 'i' for int and 'f' for float.
+ * T1 - Can get 'i' for int and 'd' for double.
+ */
 
 #define _mm512_reduce_operator_64bit(Vec512, Operator, T2, T1)         \
   __extension__({                                                      \
@@ -9717,14 +9718,15 @@ static __inline__ double __DEFAULT_FN_ATTRS _mm512_reduce_mul_pd(__m512d __W) {
   _mm512_reduce_operator_64bit(__W, *, f, d);
 }
 
-// Vec512 - Vector with size 512.
-// Vec512Neutral - All vector elements set to the identity element.
-// Identity element: {+,0},{*,1},{&,0xFFFFFFFFFFFFFFFF},{|,0}
-// Operator - Can be one of following: +,*,&,|
-// Mask - Intrinsic Mask
-// T2  - Can get 'i' for int and 'f' for float.
-// T1 - Can get 'i' for int and 'd' for packed double-precision.
-// T3 - Can be Pd for packed double or q for q-word.
+/* Vec512 - Vector with size 512.
+ * Vec512Neutral - All vector elements set to the identity element.
+ * Identity element: {+,0},{*,1},{&,0xFFFFFFFFFFFFFFFF},{|,0}
+ * Operator - Can be one of following: +,*,&,|
+ * Mask - Intrinsic Mask
+ * T2  - Can get 'i' for int and 'f' for float.
+ * T1 - Can get 'i' for int and 'd' for packed double-precision.
+ * T3 - Can be Pd for packed double or q for q-word.
+ */
 
 #define _mm512_mask_reduce_operator_64bit(Vec512, Vec512Neutral, Operator,     \
                                           Mask, T2, T1, T3)                    \
@@ -9772,10 +9774,11 @@ _mm512_mask_reduce_mul_pd(__mmask8 __M, __m512d __W) {
 #undef _mm512_reduce_operator_64bit
 #undef _mm512_mask_reduce_operator_64bit
 
-// Vec512 - Vector with size 512.
-// Operator - Can be one of following: +,*,&,|
-// T2 - Can get 'i' for int and ' ' for packed single.
-// T1 - Can get 'i' for int and 'f' for float.
+/* Vec512 - Vector with size 512.
+ * Operator - Can be one of following: +,*,&,|
+ * T2 - Can get 'i' for int and ' ' for packed single.
+ * T1 - Can get 'i' for int and 'f' for float.
+ */
 
 #define _mm512_reduce_operator_32bit(Vec512, Operator, T2, T1) __extension__({ \
     __m256##T1 Vec256 =                                                        \
@@ -9849,14 +9852,15 @@ _mm512_reduce_mul_ps(__m512 __W) {
   _mm512_reduce_operator_32bit(__W, *, f, );
 }
 
-// Vec512 - Vector with size 512.
-// Vec512Neutral - All vector elements set to the identity element.
-// Identity element: {+,0},{*,1},{&,0xFFFFFFFF},{|,0}
-// Operator - Can be one of following: +,*,&,|
-// Mask - Intrinsic Mask
-// T2  - Can get 'i' for int and 'f' for float.
-// T1 - Can get 'i' for int and 'd' for double.
-// T3 - Can be Ps for packed single or d for d-word.
+/* Vec512 - Vector with size 512.
+ * Vec512Neutral - All vector elements set to the identity element.
+ * Identity element: {+,0},{*,1},{&,0xFFFFFFFF},{|,0}
+ * Operator - Can be one of following: +,*,&,|
+ * Mask - Intrinsic Mask
+ * T2  - Can get 'i' for int and 'f' for float.
+ * T1 - Can get 'i' for int and 'd' for double.
+ * T3 - Can be Ps for packed single or d for d-word.
+ */
 
 #define _mm512_mask_reduce_operator_32bit(Vec512, Vec512Neutral, Operator,     \
                                           Mask, T2, T1, T3)                    \
@@ -9901,16 +9905,17 @@ _mm512_mask_reduce_mul_ps(__mmask16 __M, __m512 __W) {
 #undef _mm512_reduce_operator_32bit
 #undef _mm512_mask_reduce_operator_32bit
 
-// Used bisection method. At each step, we partition the vector with previous
-// step in half, and the operation is performed on its two halves.
-// This takes log2(n) steps where n is the number of elements in the vector.
-// This macro uses only intrinsics from the AVX512F feature.
+/* Used bisection method. At each step, we partition the vector with previous
+ * step in half, and the operation is performed on its two halves.
+ * This takes log2(n) steps where n is the number of elements in the vector.
+ * This macro uses only intrinsics from the AVX512F feature.
 
-// Vec512 - Vector with size of 512.
-// IntrinName - Can be one of following: {max|min}_{epi64|epu64|pd} for example:
-//              __mm512_max_epi64
-// T1 - Can get 'i' for int and 'd' for double.[__m512{i|d}]
-// T2 - Can get 'i' for int and 'f' for float. [__v8d{i|f}]
+ * Vec512 - Vector with size of 512.
+ * IntrinName - Can be one of following: {max|min}_{epi64|epu64|pd} for example:
+ *              __mm512_max_epi64
+ * T1 - Can get 'i' for int and 'd' for double.[__m512{i|d}]
+ * T2 - Can get 'i' for int and 'f' for float. [__v8d{i|f}]
+ */
 
 #define _mm512_reduce_maxMin_64bit(Vec512, IntrinName, T1, T2) __extension__({ \
         Vec512 = _mm512_##IntrinName(                                          \
@@ -9975,22 +9980,23 @@ _mm512_reduce_min_pd(__m512d __V) {
   _mm512_reduce_maxMin_64bit(__V, min_pd, d, f);
 }
 
-// Vec512 - Vector with size 512.
-// Vec512Neutral - A 512 length vector with elements set to the identity element
-// Identity element: {max_epi,0x8000000000000000}
-//                   {max_epu,0x0000000000000000}
-//                   {max_pd, 0xFFF0000000000000}
-//                   {min_epi,0x7FFFFFFFFFFFFFFF}
-//                   {min_epu,0xFFFFFFFFFFFFFFFF}
-//                   {min_pd, 0x7FF0000000000000}
-//
-// IntrinName - Can be one of following: {max|min}_{epi64|epu64|pd} for example:
-//              __mm512_max_epi64
-// T1 - Can get 'i' for int and 'd' for double.[__m512{i|d}]
-// T2 - Can get 'i' for int and 'f' for float. [__v8d{i|f}]
-// T3 - Can get 'q' q word and 'pd' for packed double.
-//      [__builtin_ia32_select{q|pd}_512]
-// Mask - Intrinsic Mask
+/* Vec512 - Vector with size 512.
+ * Vec512Neutral - A 512 length vector with elements set to the identity element
+ * Identity element: {max_epi,0x8000000000000000}
+ *                   {max_epu,0x0000000000000000}
+ *                   {max_pd, 0xFFF0000000000000}
+ *                   {min_epi,0x7FFFFFFFFFFFFFFF}
+ *                   {min_epu,0xFFFFFFFFFFFFFFFF}
+ *                   {min_pd, 0x7FF0000000000000}
+ *
+ * IntrinName - Can be one of following: {max|min}_{epi64|epu64|pd} for example:
+ *              __mm512_max_epi64
+ * T1 - Can get 'i' for int and 'd' for double.[__m512{i|d}]
+ * T2 - Can get 'i' for int and 'f' for float. [__v8d{i|f}]
+ * T3 - Can get 'q' q word and 'pd' for packed double.
+ *      [__builtin_ia32_select{q|pd}_512]
+ * Mask - Intrinsic Mask
+ */
 
 #define _mm512_mask_reduce_maxMin_64bit(Vec512, Vec512Neutral, IntrinName, T1, \
                                         T2, T3, Mask)                          \
@@ -10040,11 +10046,12 @@ _mm512_mask_reduce_min_pd(__mmask8 __M, __m512d __V) {
 #undef _mm512_reduce_maxMin_64bit
 #undef _mm512_mask_reduce_maxMin_64bit
 
-// Vec512 - Vector with size 512.
-// IntrinName - Can be one of following: {max|min}_{epi32|epu32|ps} for example:
-//              __mm512_max_epi32
-// T1 - Can get 'i' for int and ' ' .[__m512{i|}]
-// T2 - Can get 'i' for int and 'f' for float.[__v16s{i|f}]
+/* Vec512 - Vector with size 512.
+ * IntrinName - Can be one of following: {max|min}_{epi32|epu32|ps} for example:
+ *              __mm512_max_epi32
+ * T1 - Can get 'i' for int and ' ' .[__m512{i|}]
+ * T2 - Can get 'i' for int and 'f' for float.[__v16s{i|f}]
+ */
 
 #define _mm512_reduce_maxMin_32bit(Vec512, IntrinName, T1, T2) __extension__({ \
     Vec512 = _mm512_##IntrinName(                                              \
@@ -10120,22 +10127,23 @@ static __inline__ float __DEFAULT_FN_ATTRS _mm512_reduce_min_ps(__m512 a) {
   _mm512_reduce_maxMin_32bit(a, min_ps, , f);
 }
 
-// Vec512 - Vector with size 512.
-// Vec512Neutral - A 512 length vector with elements set to the identity element
-// Identity element: {max_epi,0x80000000}
-//                   {max_epu,0x00000000}
-//                   {max_ps, 0xFF800000}
-//                   {min_epi,0x7FFFFFFF}
-//                   {min_epu,0xFFFFFFFF}
-//                   {min_ps, 0x7F800000}
-//
-// IntrinName - Can be one of following: {max|min}_{epi32|epu32|ps} for example:
-//              __mm512_max_epi32
-// T1 - Can get 'i' for int and ' ' .[__m512{i|}]
-// T2 - Can get 'i' for int and 'f' for float.[__v16s{i|f}]
-// T3 - Can get 'q' q word and 'pd' for packed double.
-//      [__builtin_ia32_select{q|pd}_512]
-// Mask - Intrinsic Mask
+/* Vec512 - Vector with size 512.
+ * Vec512Neutral - A 512 length vector with elements set to the identity element
+ * Identity element: {max_epi,0x80000000}
+ *                   {max_epu,0x00000000}
+ *                   {max_ps, 0xFF800000}
+ *                   {min_epi,0x7FFFFFFF}
+ *                   {min_epu,0xFFFFFFFF}
+ *                   {min_ps, 0x7F800000}
+ *
+ * IntrinName - Can be one of following: {max|min}_{epi32|epu32|ps} for example:
+ *              __mm512_max_epi32
+ * T1 - Can get 'i' for int and ' ' .[__m512{i|}]
+ * T2 - Can get 'i' for int and 'f' for float.[__v16s{i|f}]
+ * T3 - Can get 'q' q word and 'pd' for packed double.
+ *      [__builtin_ia32_select{q|pd}_512]
+ * Mask - Intrinsic Mask
+ */
 
 #define _mm512_mask_reduce_maxMin_32bit(Vec512, Vec512Neutral, IntrinName, T1, \
                                         T2, T3, Mask)                          \
@@ -10187,4 +10195,4 @@ _mm512_mask_reduce_min_ps(__mmask16 __M, __m512 __V) {
 
 #undef __DEFAULT_FN_ATTRS
 
-#endif // __AVX512FINTRIN_H
+#endif /* __AVX512FINTRIN_H */

diff --git a/lib/Headers/f16cintrin.h b/lib/Headers/f16cintrin.h
index df7f884e5400d7dfadccc69b14a08219e4a85fd9..ceb1605d215c261c308c1e97d235a0b5e0d78df2 100644 (file)
--- a/lib/Headers/f16cintrin.h
+++ b/lib/Headers/f16cintrin.h
@@ -32,9 +32,10 @@
 #define __DEFAULT_FN_ATTRS \
   __attribute__((__always_inline__, __nodebug__, __target__("f16c")))
 
-// NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h,
-// but that's because icc can emulate these without f16c using a library call.
-// Since we don't do that let's leave these in f16cintrin.h.
+/* NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h,
+ * but that's because icc can emulate these without f16c using a library call.
+ * Since we don't do that let's leave these in f16cintrin.h.
+ */
 
 /// Converts a 16-bit half-precision float value into a 32-bit float
 ///    value.

diff --git a/lib/Headers/gfniintrin.h b/lib/Headers/gfniintrin.h
index a5895b3fe2e2d8729822285622d9cf4c72a822c5..34c555e3339a20e79d30713a173f3d425a453169 100644 (file)
--- a/lib/Headers/gfniintrin.h
+++ b/lib/Headers/gfniintrin.h
@@ -202,5 +202,5 @@ _mm512_maskz_gf2p8mul_epi8(__mmask64 __U, __m512i __A, __m512i __B)
 #undef __DEFAULT_FN_ATTRS_Z
 #undef __DEFAULT_FN_ATTRS_VL
 
-#endif // __GFNIINTRIN_H
+#endif /* __GFNIINTRIN_H */
 

diff --git a/lib/Headers/movdirintrin.h b/lib/Headers/movdirintrin.h
index ba0978f46cae5c0911b45502c676b07b61a95b3e..ec20c53709bc58bb096d42c378e00bd444e1ea33 100644 (file)
--- a/lib/Headers/movdirintrin.h
+++ b/lib/Headers/movdirintrin.h
@@ -27,7 +27,7 @@
 #ifndef _MOVDIRINTRIN_H
 #define _MOVDIRINTRIN_H
 
-// Move doubleword as direct store
+/* Move doubleword as direct store */
 static __inline__ void
 __attribute__((__always_inline__, __nodebug__,  __target__("movdiri")))
 _directstoreu_u32 (void *__dst, unsigned int  __value)
@@ -37,7 +37,7 @@ _directstoreu_u32 (void *__dst, unsigned int  __value)
 
 #ifdef __x86_64__
 
-// Move quadword as direct store
+/* Move quadword as direct store */
 static __inline__ void
 __attribute__((__always_inline__, __nodebug__,  __target__("movdiri")))
 _directstoreu_u64 (void *__dst, unsigned long __value)

diff --git a/lib/Headers/vpclmulqdqintrin.h b/lib/Headers/vpclmulqdqintrin.h
index 21cda2221007fe7cf3166f826d622c25bd4aed83..4153d888a27c8877e0d0e1d5690c47cc1c73272f 100644 (file)
--- a/lib/Headers/vpclmulqdqintrin.h
+++ b/lib/Headers/vpclmulqdqintrin.h
@@ -38,5 +38,5 @@
                                        (__v8di)(__m512i)(B),  \
                                        (char)(I)); })
 
-#endif // __VPCLMULQDQINTRIN_H
+#endif /* __VPCLMULQDQINTRIN_H */