Merging r314179:
authorDylan McKay <me@dylanmckay.io>
Thu, 28 Sep 2017 06:16:45 +0000 (06:16 +0000)
committerDylan McKay <me@dylanmckay.io>
Thu, 28 Sep 2017 06:16:45 +0000 (06:16 +0000)
------------------------------------------------------------------------
r314179 | dylanmckay | 2017-09-26 13:45:27 +1300 (Tue, 26 Sep 2017) | 11 lines

[AVR] Use 1-byte alignment for all data types

This was an oversight in the original backend data layout.

The AVR architecture does not have the concept of unaligned loads - all
loads/stores from all addresses are aligned to one byte.

Discovered in avr-rust issue #64
https://github.com/avr-rust/rust/issues/64

Patch By Gergo Erdi.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_50@314379 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AVR/AVRTargetMachine.cpp

index a9d61ffc952c3c454de4a121ff5f823c92700224..e698b6e694cfe56e63040f7658677b9c6e4e5352 100644 (file)
@@ -25,7 +25,7 @@
 
 namespace llvm {
 
-static const char *AVRDataLayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-n8";
+static const char *AVRDataLayout = "e-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8";
 
 /// Processes a CPU name.
 static StringRef getCPU(StringRef CPU) {