panic: dump some instruction memory on IllegalInstruction exception

diff --git a/components/esp32/panic.c b/components/esp32/panic.c
index 08192afae7d98a21298ad81e4f72d3e7cc27aa5a..f6a8f8aab3c942f2d18a15e4d1974f93323a6764 100644 (file)
--- a/components/esp32/panic.c
+++ b/components/esp32/panic.c
@@ -188,6 +188,7 @@ static const char *edesc[] = {
 
 static void commonErrorHandler(XtExcFrame *frame);
 static inline void disableAllWdts();
+static void illegal_instruction_helper(XtExcFrame *frame);
 
 //The fact that we've panic'ed probably means the other CPU is now running wild, possibly
 //messing up the serial output, so we stall it here.
@@ -357,11 +358,37 @@ void xt_unhandled_exception(XtExcFrame *frame)
             return;
         }
         panicPutStr(". Exception was unhandled.\r\n");
+        if (exccause == 0 /* IllegalInstruction */) {
+            illegal_instruction_helper(frame);
+        }
         esp_reset_reason_set_hint(ESP_RST_PANIC);
     }
     commonErrorHandler(frame);
 }
 
+static void illegal_instruction_helper(XtExcFrame *frame)
+{
+    /* Print out memory around the instruction word */
+    uint32_t epc = frame->pc;
+    epc = (epc & ~0x3) - 4;
+
+    /* check that the address was sane */
+    if (epc < SOC_IROM_MASK_LOW || epc >= SOC_IROM_HIGH) {
+        return;
+    }
+    volatile uint32_t* pepc = (uint32_t*)epc;
+
+    panicPutStr("Memory dump at 0x");
+    panicPutHex(epc);
+    panicPutStr(": ");
+    
+    panicPutHex(*pepc);
+    panicPutStr(" ");
+    panicPutHex(*(pepc + 1));
+    panicPutStr(" ");
+    panicPutHex(*(pepc + 2));
+    panicPutStr("\r\n");
+}
 
 /*
   If watchdogs are enabled, the panic handler runs the risk of getting aborted pre-emptively because

diff --git a/components/soc/esp32/include/soc/soc.h b/components/soc/esp32/include/soc/soc.h
index c3cb55db82a2aeaed4cb46b642f3ea4a2d2bfee2..64a0fab3fbbddf666bd4fd236ea2d5f644a9c07c 100644 (file)
--- a/components/soc/esp32/include/soc/soc.h
+++ b/components/soc/esp32/include/soc/soc.h
@@ -286,6 +286,8 @@
 #define SOC_DROM_HIGH   0x3F800000
 #define SOC_IROM_LOW    0x400D0000
 #define SOC_IROM_HIGH   0x40400000
+#define SOC_IROM_MASK_LOW   0x40000000
+#define SOC_IROM_MASK_HIGH  0x40070000
 #define SOC_CACHE_PRO_LOW   0x40070000
 #define SOC_CACHE_PRO_HIGH  0x40078000
 #define SOC_CACHE_APP_LOW   0x40078000