[PATCH] Patch to fix the AST for vector splat from any

arithmetic type to a vector so that the arithmatic type
matches the vector element type. Without which it crashes
in Code Gen. rdar://20000762

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@231419 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Sema/SemaExprCXX.cpp b/lib/Sema/SemaExprCXX.cpp
index 6ad0b24275ad13499018458909910809522e9a50..29e5150073d99f2da649aec918741fed76cd4d34 100644 (file)
--- a/lib/Sema/SemaExprCXX.cpp
+++ b/lib/Sema/SemaExprCXX.cpp
@@ -3000,8 +3000,18 @@ Sema::PerformImplicitConversion(Expr *From, QualType ToType,
     break;
 
   case ICK_Vector_Splat:
-    From = ImpCastExprToType(From, ToType, CK_VectorSplat, 
-                             VK_RValue, /*BasePath=*/nullptr, CCK).get();
+    // Vector splat from any arithmetic type to a vector.
+    // Cast to the element type.
+    {
+      QualType elType = ToType->getAs<ExtVectorType>()->getElementType();
+      if (elType != From->getType()) {
+        ExprResult E = From;
+        From = ImpCastExprToType(From, elType,
+                                 PrepareScalarCast(E, elType)).get();
+      }
+      From = ImpCastExprToType(From, ToType, CK_VectorSplat,
+                               VK_RValue, /*BasePath=*/nullptr, CCK).get();
+    }
     break;
 
   case ICK_Complex_Real:

diff --git a/test/CodeGenCXX/vector-splat-conversion.cpp b/test/CodeGenCXX/vector-splat-conversion.cpp
new file mode 100644 (file)
index 0000000..410df3d
--- /dev/null
+++ b/test/CodeGenCXX/vector-splat-conversion.cpp
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 %s -triple arm64-apple-ios8.1.0 -std=c++11 -emit-llvm -o - | FileCheck %s
+// rdar://20000762
+
+typedef __attribute__((__ext_vector_type__(8))) float vector_float8;
+
+typedef vector_float8 float8;
+
+void MandelbrotPolyCalcSIMD8()
+{
+    constexpr float8   v4 = 4.0;  // value to compare against abs(z)^2, to see if bounded
+    float8 vABS;
+    auto vLT  = vABS < v4;
+}
+
+// CHECK: store <8 x float> 
+// CHECK: [[ZERO:%.*]] = load <8 x float>, <8 x float>* [[VARBS:%.*]]
+// CHECK: [[CMP:%.*]] = fcmp olt <8 x float> [[ZERO]]
+// CHECK: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>
+// CHECK: store <8 x i32> [[SEXT]], <8 x i32>* [[VLT:%.*]]