Usually subregister definitions are consider uses of the remaining
lanes that did not get defined. Add a comment why the code in
ScheduleDAGInstrs does not add use dependencies regardless.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269107
91177308-0d34-0410-b5e6-
96231b3b80d8
// Now process all uses.
for (unsigned j = 0, n = MI->getNumOperands(); j != n; ++j) {
const MachineOperand &MO = MI->getOperand(j);
+ // Only look at use operands.
+ // We do not need to check for MO.readsReg() here because subsequent
+ // subregister defs will get output dependence edges and need no
+ // additional use dependencies.
if (!MO.isReg() || !MO.isUse())
continue;
unsigned Reg = MO.getReg();