soc: fix trace memory region for single core mode

Signed-off-by: Mahavir Jain <mahavir@espressif.com>

diff --git a/components/soc/esp32/soc_memory_layout.c b/components/soc/esp32/soc_memory_layout.c
index e60fe83307c8f1f07aefe79abbb5e0ba65cf60e7..c6fa4635d2e9bdec0513eb735247dc74c066b4c9 100644 (file)
--- a/components/soc/esp32/soc_memory_layout.c
+++ b/components/soc/esp32/soc_memory_layout.c
@@ -156,9 +156,9 @@ SOC_RESERVE_MEMORY_REGION(0x3ffae000, 0x3ffae6e0, rom_data);
 
 #if CONFIG_MEMMAP_TRACEMEM
 #if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
-SOC_RESERVE_MEMORY_REGION(0x3fff8000, 0x40000000, trace_mem); //Reserve trace mem region
+SOC_RESERVE_MEMORY_REGION(0x3fff8000, 0x40000000, trace_mem); //Reserve trace mem region, 32K for both cpu
 #else
-SOC_RESERVE_MEMORY_REGION(0x3fff8000, 0x3fffc000, trace_mem); //Reserve trace mem region
+SOC_RESERVE_MEMORY_REGION(0x3fffc000, 0x40000000, trace_mem); //Reserve trace mem region, 16K (upper-half) for pro cpu
 #endif
 #endif