[X86] Disable shouldFoldConstantShiftPairToMask for scalar shifts on AMD targets...

[X86] Disable shouldFoldConstantShiftPairToMask for scalar shifts on AMD targets (PR40758)

D61068 handled vector shifts, this patch does the same for scalars where there are similar number of pipes for shifts as bit ops - this is true almost entirely for AMD targets where the scalar ALUs are well balanced.

This combine avoids AND immediate mask which usually means we reduce encoding size.

Some tests show use of (slow, scaled) LEA instead of SHL in some cases, but thats due to particular shift immediates - shift+mask generate these just as easily.

Differential Revision: https://reviews.llvm.org/D61830

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360684 91177308-0d34-0410-b5e6-96231b3b80d8