[ARM] Classification Improvements to ARM Sched-Models. NFCI.

[ARM] Classification Improvements to ARM Sched-Models. NFCI.

This is a series of patches to enable adding of machine sched
models for ARM processors easier and compact. They define new
sched-readwrites for groups of ARM instructions. This has been
missing so far, and as a consequence, machine scheduler models
for individual sub-targets have tended to be larger than they
needed to be.

The current patch focuses on floating-point instructions.

Reviewers: Diana Picus (rovka), Renato Golin (rengolin)

Differential Revision: https://reviews.llvm.org/D28194

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292825 91177308-0d34-0410-b5e6-96231b3b80d8