]> granicus.if.org Git - llvm/commit
Merging r246937:
authorTom Stellard <thomas.stellard@amd.com>
Mon, 9 Nov 2015 16:25:11 +0000 (16:25 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Mon, 9 Nov 2015 16:25:11 +0000 (16:25 +0000)
commitf7e48cb79e65734ffb6d8b629d868d8048c206ed
treee6c94f112880cac1f17d34ac54cee30f1267edc3
parentf7ff4675596909544b4a30e8f24c4f85bc1f789d
Merging r246937:

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r246937 | hfinkel | 2015-09-06 00:17:30 -0400 (Sun, 06 Sep 2015) | 13 lines

[PowerPC] Don't commute trivial rlwimi instructions

To commute a trivial rlwimi instructions (meaning one with a full mask and zero
shift), we'd need to ability to form an all-zero mask (instead of an all-one
mask) using rlwimi. We can't represent this, however, and we'll miscompile code
if we try.

The code quality problem that this highlights (that SDAG simplification can
lead to us generating an ISD::OR node with a constant zero LHS) will be fixed
as a follow-up.

Fixes PR24719.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_37@252481 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstrInfo.cpp
test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir [new file with mode: 0644]