]> granicus.if.org Git - llvm/commit
ARM: avoid clobbering register in v6 jump-table expansion.
authorTim Northover <tnorthover@apple.com>
Wed, 15 Mar 2017 18:38:13 +0000 (18:38 +0000)
committerTim Northover <tnorthover@apple.com>
Wed, 15 Mar 2017 18:38:13 +0000 (18:38 +0000)
commitf4523b0efd797e6f9f147129bc404fedecf18ebf
tree45a7d1ae6c67764461ab7de40fadfe8cbf250927
parent1d95032b0c1e26d88176e3802477894f2f9debe6
ARM: avoid clobbering register in v6 jump-table expansion.

If we got unlucky with register allocation and actual constpool placement, we
could end up producing a tTBB_JT with an index that's already been clobbered.

Technically, we might be able to fix this situation up with a MOV, but I think
the constant islands pass is complex enough without having to deal with more
weird edge-cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297871 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/CodeGen/MIRYamlMapping.h
lib/CodeGen/MIRParser/MIRParser.cpp
lib/CodeGen/MIRPrinter.cpp
lib/Target/ARM/ARMConstantIslandPass.cpp
test/CodeGen/ARM/v6-jumptable-clobber.mir [new file with mode: 0644]
test/CodeGen/X86/GlobalISel/irtranslator-call.ll