]> granicus.if.org Git - llvm/commit
AMDGPU/GlobalISel: RegBankSelect for DS ordered add/swap
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 1 Jul 2019 17:04:57 +0000 (17:04 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 1 Jul 2019 17:04:57 +0000 (17:04 +0000)
commitf3b2d689fe32c5082d48d74d309656891fcfda62
tree776d6c7b53874a07cf9f5133985d3bfa45e87272
parent914425994ea7a896ac980a11f24f741dfd48e45b
AMDGPU/GlobalISel: RegBankSelect for DS ordered add/swap

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364811 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/IR/IntrinsicsAMDGPU.td
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir [new file with mode: 0644]