]> granicus.if.org Git - llvm/commit
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
authorCraig Topper <craig.topper@gmail.com>
Tue, 28 Mar 2017 16:35:29 +0000 (16:35 +0000)
committerCraig Topper <craig.topper@gmail.com>
Tue, 28 Mar 2017 16:35:29 +0000 (16:35 +0000)
commitee18eb90ff9e8a097bc357039ec08b6116cb3006
tree92e0a2722b3056498ccab58cfc01a450a348961d
parent3409abefac2ef5faa4f997bb9becede7e2864844
[AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers

We've had several bugs(PR32256, PR32241) recently that resulted from usages of AH/BH/CH/DH either before or after a copy to/from a mask register.

This ultimately occurs because we create COPY_TO_REGCLASS with VK1 and GR8. Then in CopyToFromAsymmetricReg in X86InstrInfo we find a 32-bit super register for the GR8 to emit the KMOV with. But as these tests are demonstrating, its possible for the GR8 register to be a high register and we end up doing an accidental extra or insert from bits 15:8.

I think the best way forward is to stop making copies directly between mask registers and GR8/GR16. Instead I think we should restrict to only copies between mask registers and GR32/GR64 and use EXTRACT_SUBREG/INSERT_SUBREG to handle the conversion from GR32 to GR16/8 or vice versa.

Unfortunately, this complicates fastisel a bit more now to create the subreg extracts where we used to create GR8 copies. We can probably make a helper function to bring down the repitition.

This does result in KMOVD being used for copies when BWI is available because we don't know the original mask register size. This caused a lot of deltas on tests because we have to split the checks for KMOVD vs KMOVW based on BWI.

Differential Revision: https://reviews.llvm.org/D30968

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298928 91177308-0d34-0410-b5e6-96231b3b80d8
57 files changed:
lib/Target/X86/X86FastISel.cpp
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrInfo.cpp
test/CodeGen/X86/avx512-calling-conv.ll
test/CodeGen/X86/avx512-cmp-kor-sequence.ll
test/CodeGen/X86/avx512-cvt.ll
test/CodeGen/X86/avx512-ext.ll
test/CodeGen/X86/avx512-extract-subvector.ll
test/CodeGen/X86/avx512-fsel.ll
test/CodeGen/X86/avx512-gather-scatter-intrin.ll
test/CodeGen/X86/avx512-insert-extract.ll
test/CodeGen/X86/avx512-intrinsics-upgrade.ll
test/CodeGen/X86/avx512-intrinsics.ll
test/CodeGen/X86/avx512-logic.ll
test/CodeGen/X86/avx512-mask-op.ll
test/CodeGen/X86/avx512-regcall-Mask.ll
test/CodeGen/X86/avx512-select.ll
test/CodeGen/X86/avx512-vec-cmp.ll
test/CodeGen/X86/avx512-vpermv3-commute.ll
test/CodeGen/X86/avx512-vpternlog-commute.ll
test/CodeGen/X86/avx512bw-intrinsics.ll
test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll
test/CodeGen/X86/avx512bwvl-intrinsics.ll
test/CodeGen/X86/avx512cdvl-intrinsics.ll
test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll
test/CodeGen/X86/avx512dq-intrinsics.ll
test/CodeGen/X86/avx512dq-mask-op.ll
test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll
test/CodeGen/X86/avx512dqvl-intrinsics.ll
test/CodeGen/X86/avx512ifma-intrinsics.ll
test/CodeGen/X86/avx512ifmavl-intrinsics.ll
test/CodeGen/X86/avx512vbmivl-intrinsics.ll
test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
test/CodeGen/X86/avx512vl-intrinsics.ll
test/CodeGen/X86/avx512vl-logic.ll
test/CodeGen/X86/combine-testm-and.ll
test/CodeGen/X86/compress_expand.ll
test/CodeGen/X86/fast-isel-load-i1.ll
test/CodeGen/X86/fast-isel-select-cmov.ll
test/CodeGen/X86/fma-fneg-combine.ll
test/CodeGen/X86/masked_gather_scatter.ll
test/CodeGen/X86/masked_memop.ll
test/CodeGen/X86/merge-consecutive-loads-512.ll
test/CodeGen/X86/pr27591.ll
test/CodeGen/X86/pr32241.ll
test/CodeGen/X86/pr32256.ll
test/CodeGen/X86/vector-shuffle-128-v16.ll
test/CodeGen/X86/vector-shuffle-256-v16.ll
test/CodeGen/X86/vector-shuffle-256-v32.ll
test/CodeGen/X86/vector-shuffle-512-v16.ll
test/CodeGen/X86/vector-shuffle-avx512.ll
test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
test/CodeGen/X86/vector-shuffle-masked.ll
test/CodeGen/X86/vector-shuffle-v1.ll