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[SelectionDAG] Add SIGN_EXTEND_VECTOR_INREG support to computeKnownBits.
authorCraig Topper <craig.topper@intel.com>
Mon, 31 Dec 2018 19:09:30 +0000 (19:09 +0000)
committerCraig Topper <craig.topper@intel.com>
Mon, 31 Dec 2018 19:09:30 +0000 (19:09 +0000)
commitead22e207a86cad13c01716c9027e65fd5ec8fbf
tree315ecc49352acac784d95011c0b98f0c36267afetree | snapshot
parente25fa6c4afdaa4a0f77e96f62cf9c67248ddd75ecommit | diff
[SelectionDAG] Add SIGN_EXTEND_VECTOR_INREG support to computeKnownBits.

Differential Revision: https://reviews.llvm.org/D56168

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350179 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff | blob | history
test/CodeGen/X86/combine-shl.ll diff | blob | history
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