]> granicus.if.org Git - llvm/commit
[ARM] Reject CSEL instructions with invalid operands
authorMikhail Maltsev <mikhail.maltsev@arm.com>
Wed, 31 Jul 2019 14:22:45 +0000 (14:22 +0000)
committerMikhail Maltsev <mikhail.maltsev@arm.com>
Wed, 31 Jul 2019 14:22:45 +0000 (14:22 +0000)
commite63e92fd0d542933c9f188dfd0141326f877d1b8
treea0e400b2d7e9058021aae6ad5f3ca5fb4c882396
parent0df00ebf0cd3f8d4795d9fa333c2377b320f249c
[ARM] Reject CSEL instructions with invalid operands

Summary:
According to the Armv8.1-M manual CSEL, CSINC, CSINV and CSNEG are
"constrained unpredictable" when SP is used as the source register Rn.

The assembler should diagnose this case.

Reviewers: momchil.velikov, dmgreen, ostannard, simon_tatham, t.p.northover

Reviewed By: ostannard

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65505

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367433 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrThumb2.td
test/MC/ARM/thumbv8.1m.s
test/MC/Disassembler/ARM/thumbv8.1m.s