]> granicus.if.org Git - llvm/commit
[X86] Add custom code to EVEX to VEX pass to turn unmasked 128-bit VPALIGND/Q into...
authorCraig Topper <craig.topper@intel.com>
Wed, 1 Nov 2017 21:00:59 +0000 (21:00 +0000)
committerCraig Topper <craig.topper@intel.com>
Wed, 1 Nov 2017 21:00:59 +0000 (21:00 +0000)
commite58f980c356b64be19785a236bb4b75abe0fc145
tree3f1950c7c32b4676dd424dc5d21b84f6ddfd219e
parent7b5f7b40ad51a43cbed5f6f821d9b702b633a8c4
[X86] Add custom code to EVEX to VEX pass to turn unmasked 128-bit VPALIGND/Q into VPALIGNR if the extended registers aren't being used.

This will enable us to prefer VALIGND/Q during shuffle lowering in order to get the extended register encoding space when BWI isn't available. But if we end up not using the extended registers we can switch VPALIGNR for the shorter VEX encoding.

Differential Revision: https://reviews.llvm.org/D39401

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317122 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86EvexToVex.cpp
test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
utils/TableGen/X86EVEX2VEXTablesEmitter.cpp