]> granicus.if.org Git - llvm/commit
GlobalISel/TableGen: Don't skip REG_SEQUENCE based on patterns
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 4 Sep 2019 16:19:34 +0000 (16:19 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 4 Sep 2019 16:19:34 +0000 (16:19 +0000)
commite2d7eae2972943fb0be2aa2e4319513c558695b2
tree129f74034b3b28d3f6c1b2ae9722a7dc454bb347
parent4610ea6eb2ff8d706ee299797b753bbf7c480065
GlobalISel/TableGen: Don't skip REG_SEQUENCE based on patterns

This partially adds support for patterns with REG_SEQUENCE. The source
patterns are now accepted, but the pattern is still rejected due to
missing support for the instruction renderer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370920 91177308-0d34-0410-b5e6-96231b3b80d8
utils/TableGen/GlobalISelEmitter.cpp