]> granicus.if.org Git - llvm/commit
Addition to r216371 (SLP and Loop Vectorization) and r218607 where
authorSuyog Sarda <suyog.sarda@samsung.com>
Tue, 11 Nov 2014 07:39:27 +0000 (07:39 +0000)
committerSuyog Sarda <suyog.sarda@samsung.com>
Tue, 11 Nov 2014 07:39:27 +0000 (07:39 +0000)
commite190f77f91b1a1aeb675a23794aeb3162566305d
treed42d8888a5d511ec808efede84c44f44fb3d961a
parent20d2a260c9d33dd733b9667de05a3224fb86ddf4
Addition to r216371 (SLP and Loop Vectorization) and r218607 where
cost model for signed division by power of 2 was improved for AArch64.
The revision r218607 missed test case for Loop Vectorization.
Adding it in this revision.

Differential Revision: http://reviews.llvm.org/D6181

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221674 91177308-0d34-0410-b5e6-96231b3b80d8
test/Transforms/LoopVectorize/AArch64/sdiv-pow2.ll [new file with mode: 0644]