]> granicus.if.org Git - llvm/commit
[X86][SSE] Recognise vXi1 boolean anyof/allof reduction patterns
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 12 Apr 2019 14:22:57 +0000 (14:22 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 12 Apr 2019 14:22:57 +0000 (14:22 +0000)
commitdfff56a5b1a03c092c4b7256a4c26ccd75f91dfa
tree4d12815cd543cf156085ce0a2c8247c0474aced0
parent0366e3e18142466e4dd99d3109d8facd093cedc8
[X86][SSE] Recognise vXi1 boolean anyof/allof reduction patterns

Currently combineHorizontalPredicateResult only handles anyof/allof reduction patterns of legal types, which can be tricky to match as type legalization of bools can introduce bitcasts/truncs/extensions.

This patch extends combineHorizontalPredicateResult to recognise vXi1 bool reductions as well and uses the existing combineBitcastvxi1 helper to create the MOVMSK necessary to then compare the signmask result.

This ensures the accuracy of the reduction costs added in D60403 which assume the MOVMSK generation.

Differential Revision: https://reviews.llvm.org/D60610

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358286 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/vector-compare-all_of.ll
test/CodeGen/X86/vector-compare-any_of.ll