]> granicus.if.org Git - llvm/commit
[AVR] Expand 16-bit rotations during the legalization stage
authorDylan McKay <me@dylanmckay.io>
Fri, 7 Jun 2019 06:55:00 +0000 (06:55 +0000)
committerDylan McKay <me@dylanmckay.io>
Fri, 7 Jun 2019 06:55:00 +0000 (06:55 +0000)
commitdbdf58d17ebf674b1eae2b3bbc36a449af6e1f41
tree2d6475d60a32279144b58afbe70d091c9dee7f2c
parent9bdaadd3a92f13317af5d61a1ddd14e287ecd0c8
[AVR] Expand 16-bit rotations during the legalization stage

In r356860, the legalization logic for BSWAP was modified to ISD::ROTL,
rather than the old ISD::{SHL, SRL, OR} nodes.

This works fine on AVR for 8-bit rotations, but 16-bit rotations are
currently unimplemented - they always trigger an assertion error in the
AVRExpandPseudoInsts pass ("RORW unimplemented").

This patch instructions the legalizer to expand 16-bit rotations into
the previous SHL, SRL, OR pattern it did previously.

This fixes the 'issue-cannot-select-bswap.ll' test. Interestingly, this
test failure seems flaky - it passes successfully on the avr-build-01
buildbot, but fails locally on my Arch Linux install.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362773 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AVR/AVRISelLowering.cpp