]> granicus.if.org Git - llvm/commit
Merging r322372 and r322767:
authorHans Wennborg <hans@hanshq.net>
Wed, 24 Jan 2018 15:33:33 +0000 (15:33 +0000)
committerHans Wennborg <hans@hanshq.net>
Wed, 24 Jan 2018 15:33:33 +0000 (15:33 +0000)
commitd8c108c8d0c90508261ec8c7688993c0f23583f5
tree4c33363a78112fb8279b3ca678a58527061ff433
parentd952162cf65354b6f918b511746b44e2b8921536
Merging r322372 and r322767:

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r322372 | nemanjai | 2018-01-12 15:58:41 +0100 (Fri, 12 Jan 2018) | 10 lines

[PowerPC] Zero-extend the compare operand for ATOMIC_CMP_SWAP

Part of the fix for https://bugs.llvm.org/show_bug.cgi?id=35812.
This patch ensures that the compare operand for the atomic compare and swap
is properly zero-extended to 32 bits if applicable.
A follow-up commit will fix the extension for the SETCC node generated when
expanding an ATOMIC_CMP_SWAP_WITH_SUCCESS. That will complete the bug fix.

Differential Revision: https://reviews.llvm.org/D41856

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r322767 | efriedma | 2018-01-17 23:04:36 +0100 (Wed, 17 Jan 2018) | 12 lines

[LegalizeDAG] Fix ATOMIC_CMP_SWAP_WITH_SUCCESS legalization.

The code wasn't zero-extending correctly, so the comparison could
spuriously fail.

Adds some AArch64 tests to cover this case.

Inspired by D41791.

Differential Revision: https://reviews.llvm.org/D41798

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323334 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCISelLowering.h
lib/Target/PowerPC/PPCInstrInfo.td
test/CodeGen/AArch64/atomic-ops-lse.ll
test/CodeGen/ARM/atomic-cmpxchg.ll
test/CodeGen/ARM/cmpxchg-O0.ll
test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll [new file with mode: 0644]
test/CodeGen/PowerPC/atomics-regression.ll