]> granicus.if.org Git - llvm/commit
[ARM] Add tGPRwithpc register class and use it for TBB/THH
authorFlorian Hahn <florian.hahn@arm.com>
Thu, 29 Jun 2017 08:45:31 +0000 (08:45 +0000)
committerFlorian Hahn <florian.hahn@arm.com>
Thu, 29 Jun 2017 08:45:31 +0000 (08:45 +0000)
commitd83ceeeedb9350b8200ff0bb5c592187fcb1bd04
treeda70675fc21911aaf5a4442e318ff99cc8d40a74
parent4976d5c7cb7165e250406d531bf2fdc97cae4de1
[ARM] Add tGPRwithpc register class and use it for TBB/THH

Summary:
TBB and THH allow using a Thumb GPR or the PC as destination operand.
A few machine verifier failures where due to those instructions not
expecting PC as destination operand.

Add -verify-machineinstrs to test/CodeGen/ARM/jump-table-tbh.ll to add
test coverage even if expensive checks are disabled.

Reviewers: MatzeB, t.p.northover, jmolloy

Reviewed By: MatzeB

Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34610

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306654 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrThumb.td
lib/Target/ARM/ARMRegisterInfo.td
test/CodeGen/ARM/jump-table-tbh.ll