]> granicus.if.org Git - llvm/commit
[PowerPC] Utilize DQ-Form instructions for spill/restore and fix FrameIndex eliminati...
authorLei Huang <lei@ca.ibm.com>
Wed, 11 Oct 2017 20:20:58 +0000 (20:20 +0000)
committerLei Huang <lei@ca.ibm.com>
Wed, 11 Oct 2017 20:20:58 +0000 (20:20 +0000)
commitd5b424820ccc75656e16502c75993d221d779c1f
tree103f078ff88976f5499fd9a650e6772965e72962
parente315d738d1b61d5620a6157b76ba18a311868e6d
[PowerPC] Utilize DQ-Form instructions for spill/restore and fix FrameIndex elimination to only use `lis/addi` if necessary.

Currently we produce a bunch of unnecessary code when emitting the
prologue/epilogue for spills/restores.  Namely, if the load from stack
slot/store to stack slot instruction is an X-Form instruction, we will
always produce an LIS/ORI sequence for the stack offset.

Furthermore, we have not exploited the P9 vector D-Form loads/stores for this
purpose.

This patch address both issues.

Specifying the D-Form load as the instruction to use for stack spills/reloads
should be safe because:

1. The stack should be aligned according to the ABI
2. If the stack isn't aligned, PPCRegisterInfo::eliminateFrameIndex() will
   check for the offset being a multiple of 16 and will convert it to an
   X-Form instruction if it isn't.

Differential Revision : https://reviews.llvm.org/D38758

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315500 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstrInfo.cpp
lib/Target/PowerPC/PPCRegisterInfo.cpp
test/CodeGen/PowerPC/fast-isel-conversion.ll
test/CodeGen/PowerPC/vsx-spill.ll
test/CodeGen/PowerPC/vsx.ll
test/CodeGen/PowerPC/vsxD-Form-spills.ll [new file with mode: 0644]