]> granicus.if.org Git - llvm/commit
[GlobalISel] Accept multiple vregs for lowerCall's result
authorDiana Picus <diana.picus@linaro.org>
Thu, 27 Jun 2019 09:15:53 +0000 (09:15 +0000)
committerDiana Picus <diana.picus@linaro.org>
Thu, 27 Jun 2019 09:15:53 +0000 (09:15 +0000)
commitd3b26382a98494df478fc8fa98b2017b40e64f45
tree191ab8ccf2db449ec727d60e352aea67f52a75c0
parent4776c1ff9754c848bc75c0892b583f67a05211ea
[GlobalISel] Accept multiple vregs for lowerCall's result

Change the interface of CallLowering::lowerCall to accept several
virtual registers for the call result, instead of just one.  This is a
follow-up to D46018.

CallLowering::lowerReturn was similarly refactored in D49660 and
lowerFormalArguments in D63549.

With this change, we no longer pack the virtual registers generated for
aggregates into one big lump before delegating to the target. Therefore,
the target can decide itself whether it wants to handle them as separate
pieces or use one big register.

ARM and AArch64 have been updated to use the passed in virtual registers
directly, which means we no longer need to generate so many
merge/extract instructions.

NFCI for AMDGPU, Mips and X86.

Differential Revision: https://reviews.llvm.org/D63550

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364511 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/CodeGen/GlobalISel/CallLowering.h
lib/CodeGen/GlobalISel/CallLowering.cpp
lib/CodeGen/GlobalISel/IRTranslator.cpp
lib/Target/AArch64/AArch64CallLowering.cpp
lib/Target/ARM/ARMCallLowering.cpp
lib/Target/ARM/ARMLegalizerInfo.cpp
lib/Target/Mips/MipsCallLowering.cpp
lib/Target/X86/X86CallLowering.cpp
test/CodeGen/AArch64/GlobalISel/call-translator.ll
test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll