]> granicus.if.org Git - llvm/commit
[MVT] Add v16f16 and v32f16 vectors.
authorCraig Topper <craig.topper@intel.com>
Wed, 21 Aug 2019 19:14:48 +0000 (19:14 +0000)
committerCraig Topper <craig.topper@intel.com>
Wed, 21 Aug 2019 19:14:48 +0000 (19:14 +0000)
commitd30143fb9de1e56e91a5f9ab981c5efb4695ba1e
tree5b4aa12ed20b062a63c72fdcc2052aa9250e8871
parentd3d41c932fd9bc3a89ab9b5a5008089bc816713a
[MVT] Add v16f16 and v32f16 vectors.

I might look at improving PR43065 which will require being
able to mark a 256 and 512 bit vector of f16 as Legal.

Differential Revision: https://reviews.llvm.org/D66515

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369565 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/CodeGen/ValueTypes.td
include/llvm/Support/MachineValueType.h
lib/CodeGen/ValueTypes.cpp
lib/Target/AMDGPU/AMDGPUISelLowering.cpp