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[X86] Add CodeGenOnly instructions for (f32 (X86selects $mask, (loadf32 addr), fp32im...
authorCraig Topper <craig.topper@intel.com>
Thu, 26 Sep 2019 22:23:09 +0000 (22:23 +0000)
committerCraig Topper <craig.topper@intel.com>
Thu, 26 Sep 2019 22:23:09 +0000 (22:23 +0000)
commitd27d2d709ec0d1d232a228ebfdd2b6381cae2f69
treeb3d8890ef420d6369f2ea7f486d3a8d672c2b3edtree | snapshot
parent255118a958473ad4e8a2823f6e91615c0b20fcd2commit | diff
[X86] Add CodeGenOnly instructions for (f32 (X86selects $mask, (loadf32 addr), fp32imm0) to use masked MOVSS from memory.

Similar for f64 and having a non-zero passthru value.

We were previously not trying to fold the load at all. Using
a CodeGenOnly instruction allows us to use FR32X/FR64X as the
register class to avoid a bunch of COPY_TO_REGCLASS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373021 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrAVX512.td diff | blob | history
test/CodeGen/X86/avx512-cmp.ll diff | blob | history
test/CodeGen/X86/pr38803.ll diff | blob | history
test/CodeGen/X86/select-of-fp-constants.ll diff | blob | history
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