]> granicus.if.org Git - libvpx/commit
Add shift stage in FASTSSIM computation
authorYaowu Xu <yaowu@google.com>
Mon, 22 Feb 2016 20:58:38 +0000 (12:58 -0800)
committerYaowu Xu <yaowu@google.com>
Mon, 22 Feb 2016 22:58:10 +0000 (14:58 -0800)
commitd1c5cd4a3075eeb5af1d05c41424d0e7bd6632f7
tree37cf8ac5be48bc26e9b3e45b6921697458001d29
parent195bf52bcabea8a077db6eab5cf9a2eaf929f670
Add shift stage in FASTSSIM computation

This commits adds a shift stage for FASTSSIM computaton when source
bit depth is different from working bit depth, to make sure metric
results are calculated in bit_depth consistent with source.

Change-Id: I997799634076ef7b00fd051710544681ed536185
test/hbd_metrics_test.cc
vp10/encoder/encoder.c
vp9/encoder/vp9_encoder.c
vpx_dsp/fastssim.c
vpx_dsp/ssim.h