]> granicus.if.org Git - llvm/commit
[x86] don't blindly transform SETB into SBB
authorSanjay Patel <spatel@rotateright.com>
Sun, 12 Mar 2017 18:28:48 +0000 (18:28 +0000)
committerSanjay Patel <spatel@rotateright.com>
Sun, 12 Mar 2017 18:28:48 +0000 (18:28 +0000)
commitcc9614d291972c3dea88815ad4afa5d8b14bad0c
tree116c00d4659ed17326e7ccd4526f4f75db0c74fd
parent5596b4146cdd2d19cebbb4953a5d0c0987c7fd88
[x86] don't blindly transform SETB into SBB

I noticed unnecessary 'sbb' instructions in D30472 and while looking at 'ptest' codegen recently.
This happens because we were transforming any 'setb' - even when we only wanted a single-bit result.

This patch moves those transforms under visitAdd/visitSub, so we we're only creating sbb/adc when it
is a win. I don't know why we need a SETCC_CARRY node type, but I'm not proposing to change that
existing behavior in this patch.

Also, I'm skeptical that sbb/adc are a win for all micro-arches, so I added comments to the test files
where this transform still fires.

The test changes here are all cases where we no longer produce sbb/adc. Avoiding partial register
stalls (generating an xor to clear a register) is not handled in some cases, but that's a separate
issue.

Differential Revision: https://reviews.llvm.org/D30611

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297586 91177308-0d34-0410-b5e6-96231b3b80d8
16 files changed:
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/add-of-carry.ll
test/CodeGen/X86/avx-intrinsics-fast-isel.ll
test/CodeGen/X86/avx-intrinsics-x86.ll
test/CodeGen/X86/avx512-insert-extract.ll
test/CodeGen/X86/avx512-intrinsics.ll
test/CodeGen/X86/ctpop-combine.ll
test/CodeGen/X86/fast-isel-cmp.ll
test/CodeGen/X86/peep-setb.ll
test/CodeGen/X86/pr26350.ll
test/CodeGen/X86/setcc.ll
test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
test/CodeGen/X86/sse41-intrinsics-x86.ll
test/CodeGen/X86/sse41.ll
test/CodeGen/X86/sse42-intrinsics-fast-isel.ll
test/CodeGen/X86/sse42-intrinsics-x86.ll