Merging r324645:
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r324645 | dwmw2 | 2018-02-08 12:06:05 -0800 (Thu, 08 Feb 2018) | 5 lines
[X86] Support 'V' register operand modifier
This allows the register name to be printed without the leading '%'.
This can be used for emitting calls to the retpoline thunks from inline
asm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@325083
91177308-0d34-0410-b5e6-
96231b3b80d8
projects / llvm / commit