]> granicus.if.org Git - llvm/commit
[SystemZ] Refactor branch and conditional instruction patterns
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 8 Nov 2016 18:30:50 +0000 (18:30 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 8 Nov 2016 18:30:50 +0000 (18:30 +0000)
commitc84d2a5725bc32baf5c66a3236a94f72a8c810fe
treeaef1204100a2ab4d10b16db58bbfa0834a7d5cae
parent5195166c0837a95ced697bb287999a67f50d3dac
[SystemZ] Refactor branch and conditional instruction patterns

Rework patterns for branches, call & return instructions,
compare-and-branch, compare-and-trap, and conditional move
instructions.

In particular, simplify creation of patterns for the extended
opcodes of instructions that take a CC mask.

Also, use semantical instruction classes for all the instructions
instead of open-coding them in SystemZInstrInfo.td.

Adds a couple of the basic branch instructions (that are unused
for codegen) for the assembler/disassembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286263 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/SystemZ/SystemZAsmPrinter.cpp
lib/Target/SystemZ/SystemZInstrFormats.td
lib/Target/SystemZ/SystemZInstrInfo.td
lib/Target/SystemZ/SystemZScheduleZ13.td
lib/Target/SystemZ/SystemZScheduleZ196.td
lib/Target/SystemZ/SystemZScheduleZEC12.td
test/MC/Disassembler/SystemZ/insns.txt
test/MC/SystemZ/insn-bad.s
test/MC/SystemZ/insn-good.s