]> granicus.if.org Git - llvm/commit
[AIX]Lowering global address for 32/64bit small/large code models
authorXiangling Liao <xiangxdh@gmail.com>
Tue, 13 Aug 2019 20:29:01 +0000 (20:29 +0000)
committerXiangling Liao <xiangxdh@gmail.com>
Tue, 13 Aug 2019 20:29:01 +0000 (20:29 +0000)
commitc6f50310583bfd3c280510802d8684a5b1f66cfb
treefeee111639949417a6a3c3195501a1f0bb25e706
parent06d793d23340f6a7116c51913ef5cb3ab4ac12af
[AIX]Lowering global address for 32/64bit small/large code models

    This patch implements global address lowering for 32/64 bit with small/large code models.
    1.For 32bit large code model on AIX, there are newly added pseudo opcode LWZtocL & ADDIStocHA32, the support of which on MC layer will be
       provided by future patches.
    2.The default code model on AIX should be small code model.
    3.Since AIX does not have medium code model, "report_fatal_error" when users specify it.

    Differential Revision: https://reviews.llvm.org/D63547

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368744 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCISelLowering.h
lib/Target/PowerPC/PPCInstrInfo.td
lib/Target/PowerPC/PPCTOCRegDeps.cpp
lib/Target/PowerPC/PPCTargetMachine.cpp
test/CodeGen/PowerPC/lower-globaladdr32-aix.ll [new file with mode: 0644]
test/CodeGen/PowerPC/lower-globaladdr64-aix.ll [new file with mode: 0644]