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[Hexagon] Aid bit-reverse load intrinsics lowering with bitcode
authorKrzysztof Parzyszek <kparzysz@codeaurora.org>
Thu, 29 Mar 2018 13:54:31 +0000 (13:54 +0000)
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>
Thu, 29 Mar 2018 13:54:31 +0000 (13:54 +0000)
commitc6a82d971b6ef9d1d5f8745f023673a8009b41a1
treec0e3adb5df296f38798136e760accd399c3c515btree | snapshot
parentbb1812b73ee532a2466cc7044820f4d23484dcf8commit | diff
[Hexagon] Aid bit-reverse load intrinsics lowering with bitcode

The conversion of operatios to bitcode helps to eliminate an additional
store in certain cases. We used to lower these load intrinsics in DAG to
DAG conversion by which time, the "Dead Store Elimination" pass is
already run. There is an associated LLVM patch.

Patch by Sumanth Gundapaneni.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@328776 91177308-0d34-0410-b5e6-96231b3b80d8
include/clang/Basic/BuiltinsHexagon.def diff | blob | history
lib/CodeGen/CGBuiltin.cpp diff | blob | history
test/CodeGen/builtins-hexagon.c diff | blob | history
test/CodeGen/hexagon-brev-ld-ptr-incdec.c [new file with mode: 0644] blob
test/CodeGen/hexagon-brev-store-elm.c [new file with mode: 0644] blob
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