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[X86] Remove PALIGNR/VALIGN handling from combineBitcastForMaskedOp and move to isel...
authorCraig Topper <craig.topper@intel.com>
Fri, 3 Nov 2017 06:48:02 +0000 (06:48 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 3 Nov 2017 06:48:02 +0000 (06:48 +0000)
commitc43a693efb02155f32e2f61310262082d27f91f3
tree0e8d20385419faccb256ef44dd130fc79b50c1b6tree | snapshot
parent06d5ebdc63193e9cc621d9d85d57b4205981f692commit | diff
[X86] Remove PALIGNR/VALIGN handling from combineBitcastForMaskedOp and move to isel patterns instead. Prefer 128-bit VALIGND/VALIGNQ over PALIGNR during lowering when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317299 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
lib/Target/X86/X86InstrAVX512.td diff | blob | history
test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll diff | blob | history
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