]> granicus.if.org Git - llvm/commit
MemTag: unchecked load/store optimization.
authorEvgeniy Stepanov <eugeni.stepanov@gmail.com>
Fri, 30 Aug 2019 17:23:02 +0000 (17:23 +0000)
committerEvgeniy Stepanov <eugeni.stepanov@gmail.com>
Fri, 30 Aug 2019 17:23:02 +0000 (17:23 +0000)
commitbe8955443d5e38231d086bf3bbd595744d98443b
treec121eba74af38b962c6073c5fa8ae717c296c12d
parentcdceebe6b6109e4ed52d504e958c2dd2ea6f38af
MemTag: unchecked load/store optimization.

Summary:
MTE allows memory access to bypass tag check iff the address argument
is [SP, #imm]. This change takes advantage of this to demote uses of
tagged addresses to regular FrameIndex operands, reducing register
pressure in large functions.

MO_TAGGED target flag is used to signal that the FrameIndex operand
refers to memory that might be tagged, and needs to be handled with
care. Such operand must be lowered to [SP, #imm] directly, without a
scratch register.

The transformation pass attempts to predict when the offset will be
out of range and disable the optimization.
AArch64RegisterInfo::eliminateFrameIndex has an escape hatch in case
this prediction has been wrong, but it is quite inefficient and should
be avoided.

Reviewers: pcc, vitalybuka, ostannard

Subscribers: mgorny, javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66457

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370490 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64.h
lib/Target/AArch64/AArch64RegisterInfo.cpp
lib/Target/AArch64/AArch64StackTaggingPreRA.cpp [new file with mode: 0644]
lib/Target/AArch64/AArch64TargetMachine.cpp
lib/Target/AArch64/CMakeLists.txt
lib/Target/AArch64/Utils/AArch64BaseInfo.h
test/CodeGen/AArch64/O3-pipeline.ll
test/CodeGen/AArch64/stack-tagging-unchecked-ld-st.ll [new file with mode: 0644]