]> granicus.if.org Git - llvm/commit
[X86] Add isel pattern to match VZEXT_MOVL and a v2i64 scalar_to_vector bitcasted...
authorCraig Topper <craig.topper@intel.com>
Thu, 15 Aug 2019 06:46:30 +0000 (06:46 +0000)
committerCraig Topper <craig.topper@intel.com>
Thu, 15 Aug 2019 06:46:30 +0000 (06:46 +0000)
commitbe701541d59d751d722378a322e3d958dae0e3a6
treef8eb21b92efdb59f423ec7e83534159cb4167548
parent8cc82cf54bbe33c085fffe98d7d0779d4b7b6d36
[X86] Add isel pattern to match VZEXT_MOVL and a v2i64 scalar_to_vector bitcasted from x86mmx to MOVQ2DQ.

We already had the pattern for just the scalar to vector and bitcast,
but not the case where we wanted zeroes in the high half of the xmm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368972 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrMMX.td
test/CodeGen/X86/mmx-cvt.ll