]> granicus.if.org Git - llvm/commit
[ARM] GlobalISel: Add FPR reg bank
authorDiana Picus <diana.picus@linaro.org>
Wed, 8 Feb 2017 13:23:04 +0000 (13:23 +0000)
committerDiana Picus <diana.picus@linaro.org>
Wed, 8 Feb 2017 13:23:04 +0000 (13:23 +0000)
commitbb65a8b75f90232b7dc920c32b301e167e8ccea6
treef85d6abc98c51f2b8a0048677dd3a0e4cb258fcb
parent4a71f66bfc964b398251706fc96ecd6f067372f9
[ARM] GlobalISel: Add FPR reg bank

Add a register bank for floating point values and select simple instructions
using them (add, copies from GPR).

This assumes that the hardware can cope with a single precision add (VADDS)
instruction, so the legalizer will treat G_FADD as legal and the instruction
selector will refuse to select if the hardware doesn't support it. In the future
we'll want to be more careful about this, and legalize to libcalls if we have to
use soft float.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294442 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstructionSelector.cpp
lib/Target/ARM/ARMLegalizerInfo.cpp
lib/Target/ARM/ARMRegisterBankInfo.cpp
lib/Target/ARM/ARMRegisterBanks.td
test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir