[ARM] [FIX] Add missing f16 vector operations lowering

[ARM] [FIX] Add missing f16 vector operations lowering

Summary:
Add missing <8xhalf> shufflevectors pattern, when using concat_vector dag node.
As well, allows <8xhalf> and <4xhalf> vldup1 operations.

These instructions are required for v8.2a fp16 lowering of vmul_n_f16, vmulq_n_f16 and vmulq_lane_f16 intrinsics.

Reviewers: olista01, pbarrio, LukeGeeson, efriedma

Reviewed By: efriedma

Subscribers: efriedma, javed.absar, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60319

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358081 91177308-0d34-0410-b5e6-96231b3b80d8